Merge pull request #2203 from embassy-rs/h7-sai4only-fix
stm32/sai: fix build on chips with only SAI4 (like stm32h725re), improve sync config.
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commit
e3be0b957a
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ci.sh
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ci.sh
@ -110,6 +110,7 @@ cargo batch \
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--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32h753zi,defmt,exti,time-driver-any,unstable-traits,time \
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--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32h753zi,defmt,exti,time-driver-any,unstable-traits,time \
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--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32h735zg,defmt,exti,time-driver-any,unstable-traits,time \
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--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32h735zg,defmt,exti,time-driver-any,unstable-traits,time \
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--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32h755zi-cm7,defmt,exti,time-driver-any,unstable-traits,time \
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--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32h755zi-cm7,defmt,exti,time-driver-any,unstable-traits,time \
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--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32h725re,defmt,exti,time-driver-any,unstable-traits,time \
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--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32h7b3ai,defmt,exti,time-driver-any,unstable-traits,time \
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--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32h7b3ai,defmt,exti,time-driver-any,unstable-traits,time \
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--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32l476vg,defmt,exti,time-driver-any,unstable-traits,time \
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--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32l476vg,defmt,exti,time-driver-any,unstable-traits,time \
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--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32l422cb,defmt,exti,time-driver-any,unstable-traits,time \
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--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32l422cb,defmt,exti,time-driver-any,unstable-traits,time \
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@ -61,6 +61,7 @@ fn main() {
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let mut singletons: Vec<String> = Vec::new();
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let mut singletons: Vec<String> = Vec::new();
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for p in METADATA.peripherals {
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for p in METADATA.peripherals {
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if let Some(r) = &p.registers {
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if let Some(r) = &p.registers {
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println!("cargo:rustc-cfg=peri_{}", p.name.to_ascii_lowercase());
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match r.kind {
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match r.kind {
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// Generate singletons per pin, not per port
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// Generate singletons per pin, not per port
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"gpio" => {
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"gpio" => {
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@ -207,27 +207,40 @@ impl Protocol {
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}
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}
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#[derive(Copy, Clone, PartialEq)]
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#[derive(Copy, Clone, PartialEq)]
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pub enum SyncEnable {
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pub enum SyncInput {
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Asynchronous,
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/// Not synced to any other SAI unit.
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None,
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/// Syncs with the other A/B sub-block within the SAI unit
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/// Syncs with the other A/B sub-block within the SAI unit
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Internal,
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Internal,
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/// Syncs with a sub-block in the other SAI unit - use set_sync_output() and set_sync_input()
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/// Syncs with a sub-block in the other SAI unit
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#[cfg(any(sai_v4))]
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#[cfg(sai_v4)]
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External,
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External(SyncInputInstance),
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}
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}
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impl SyncEnable {
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impl SyncInput {
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#[cfg(any(sai_v1, sai_v2, sai_v3, sai_v4))]
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pub const fn syncen(&self) -> vals::Syncen {
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pub const fn syncen(&self) -> vals::Syncen {
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match self {
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match self {
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SyncEnable::Asynchronous => vals::Syncen::ASYNCHRONOUS,
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SyncInput::None => vals::Syncen::ASYNCHRONOUS,
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SyncEnable::Internal => vals::Syncen::INTERNAL,
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SyncInput::Internal => vals::Syncen::INTERNAL,
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#[cfg(any(sai_v4))]
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#[cfg(any(sai_v4))]
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SyncEnable::External => vals::Syncen::EXTERNAL,
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SyncInput::External(_) => vals::Syncen::EXTERNAL,
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}
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}
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}
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}
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}
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}
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#[cfg(sai_v4)]
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#[derive(Copy, Clone, PartialEq)]
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pub enum SyncInputInstance {
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#[cfg(peri_sai1)]
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Sai1 = 0,
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#[cfg(peri_sai2)]
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Sai2 = 1,
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#[cfg(peri_sai3)]
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Sai3 = 2,
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#[cfg(peri_sai4)]
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Sai4 = 3,
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}
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#[derive(Copy, Clone, PartialEq)]
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#[derive(Copy, Clone, PartialEq)]
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pub enum StereoMono {
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pub enum StereoMono {
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Stereo,
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Stereo,
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@ -428,8 +441,8 @@ impl MasterClockDivider {
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pub struct Config {
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pub struct Config {
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pub mode: Mode,
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pub mode: Mode,
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pub tx_rx: TxRx,
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pub tx_rx: TxRx,
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pub sync_enable: SyncEnable,
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pub sync_input: SyncInput,
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pub is_sync_output: bool,
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pub sync_output: bool,
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pub protocol: Protocol,
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pub protocol: Protocol,
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pub slot_size: SlotSize,
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pub slot_size: SlotSize,
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pub slot_count: word::U4,
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pub slot_count: word::U4,
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@ -459,8 +472,8 @@ impl Default for Config {
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Self {
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Self {
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mode: Mode::Master,
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mode: Mode::Master,
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tx_rx: TxRx::Transmitter,
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tx_rx: TxRx::Transmitter,
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is_sync_output: false,
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sync_output: false,
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sync_enable: SyncEnable::Asynchronous,
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sync_input: SyncInput::None,
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protocol: Protocol::Free,
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protocol: Protocol::Free,
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slot_size: SlotSize::DataSize,
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slot_size: SlotSize::DataSize,
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slot_count: word::U4(2),
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slot_count: word::U4(2),
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@ -608,18 +621,18 @@ impl<'d, T: Instance> Sai<'d, T> {
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fn update_synchronous_config(config: &mut Config) {
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fn update_synchronous_config(config: &mut Config) {
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config.mode = Mode::Slave;
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config.mode = Mode::Slave;
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config.is_sync_output = false;
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config.sync_output = false;
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#[cfg(any(sai_v1, sai_v2, sai_v3))]
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#[cfg(any(sai_v1, sai_v2, sai_v3))]
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{
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{
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config.sync_enable = SyncEnable::Internal;
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config.sync_input = SyncInput::Internal;
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}
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}
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#[cfg(any(sai_v4))]
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#[cfg(any(sai_v4))]
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{
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{
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//this must either be Internal or External
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//this must either be Internal or External
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//The asynchronous sub-block on the same SAI needs to enable is_sync_output
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//The asynchronous sub-block on the same SAI needs to enable sync_output
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assert!(config.sync_enable != SyncEnable::Asynchronous);
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assert!(config.sync_input != SyncInput::None);
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}
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}
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}
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}
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@ -866,20 +879,13 @@ impl<'d, T: Instance, C: Channel, W: word::Word> SubBlock<'d, T, C, W> {
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#[cfg(any(sai_v4))]
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#[cfg(any(sai_v4))]
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{
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{
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// Not totally clear from the datasheet if this is right
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if let SyncInput::External(i) = config.sync_input {
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// This is only used if using SyncEnable::External on the other SAI unit
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// Syncing from SAIX subblock A to subblock B does not require this
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// Only syncing from SAI1 subblock A/B to SAI2 subblock A/B
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let value: u8 = if T::REGS.as_ptr() == stm32_metapac::SAI1.as_ptr() {
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1 //this is SAI1, so sync with SAI2
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} else {
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0 //this is SAI2, so sync with SAI1
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};
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T::REGS.gcr().modify(|w| {
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T::REGS.gcr().modify(|w| {
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w.set_syncin(value);
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w.set_syncin(i as u8);
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});
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});
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}
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if config.is_sync_output {
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if config.sync_output {
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let syncout: u8 = match sub_block {
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let syncout: u8 = match sub_block {
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WhichSubBlock::A => 0b01,
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WhichSubBlock::A => 0b01,
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WhichSubBlock::B => 0b10,
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WhichSubBlock::B => 0b10,
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@ -903,7 +909,7 @@ impl<'d, T: Instance, C: Channel, W: word::Word> SubBlock<'d, T, C, W> {
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w.set_ds(config.data_size.ds());
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w.set_ds(config.data_size.ds());
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w.set_lsbfirst(config.bit_order.lsbfirst());
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w.set_lsbfirst(config.bit_order.lsbfirst());
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w.set_ckstr(config.clock_strobe.ckstr());
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w.set_ckstr(config.clock_strobe.ckstr());
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w.set_syncen(config.sync_enable.syncen());
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w.set_syncen(config.sync_input.syncen());
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w.set_mono(config.stereo_mono.mono());
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w.set_mono(config.stereo_mono.mono());
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w.set_outdriv(config.output_drive.outdriv());
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w.set_outdriv(config.output_drive.outdriv());
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w.set_mckdiv(config.master_clock_divider.mckdiv());
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w.set_mckdiv(config.master_clock_divider.mckdiv());
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