option to not restart if not in time
This commit is contained in:
Dietrich Beck
@ -194,7 +194,7 @@ impl<'a, C: Channel> Future for Transfer<'a, C> {
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pub enum Read<'a, W: Word> {
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Constant(&'a W),
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Increase(&'a [W]),
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// TODO ring also possible, but more complicated due to generic size and alignment requirements
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// ring also possible, but more complicated due to generic size and alignment requirements
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}
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impl<'a, W: Word> Read<'a, W> {
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@ -219,73 +219,42 @@ impl<'a, W: Word> Read<'a, W> {
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}
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}
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struct InnerChannels<'a, C1: Channel, C2: Channel> {
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struct InnerContinuous<'a, 'c, 'r, W: Word, C1: Channel, C2: Channel> {
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data: PeripheralRef<'a, C1>,
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control: PeripheralRef<'a, C2>,
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}
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impl<'a, C1: Channel, C2: Channel> Drop for InnerChannels<'a, C1, C2> {
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fn drop(&mut self) {
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pac::DMA
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.chan_abort()
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.modify(|m| m.set_chan_abort((1 << self.data.number()) | (1 << self.control.number())));
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// wait until both channels are ready again, this should go quite fast so no async used here
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while self.data.regs().ctrl_trig().read().busy() || self.control.regs().ctrl_trig().read().busy() {}
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}
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}
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pub struct ContinuousTransfer<'a, 'b, 'c, 'r, W: Word, C1: Channel, C2: Channel> {
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channels: InnerChannels<'a, C1, C2>,
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#[allow(dead_code)] // reference is kept to signal that dma channels are writing to it
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buffer: &'b mut [W],
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control_input: &'c mut [[u32; 4]; 2],
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control_input: &'c mut [u32; 4],
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dreq: TreqSel,
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read: Read<'r, W>,
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}
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impl<'a, 'b, 'c, 'r, W: Word, C1: Channel, C2: Channel> ContinuousTransfer<'a, 'b, 'c, 'r, W, C1, C2> {
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pub fn start_new(
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ch1: PeripheralRef<'a, C1>,
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ch2: PeripheralRef<'a, C2>,
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control_input: &'c mut [[u32; 4]; 2],
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buffer: &'b mut [W],
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dreq: TreqSel,
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mut read: Read<'r, W>,
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) -> ContinuousTransfer<'a, 'b, 'c, 'r, W, C1, C2> {
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let channels = InnerChannels {
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data: ch1,
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control: ch2,
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};
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impl<'a, 'c, 'r, W: Word, C1: Channel, C2: Channel> InnerContinuous<'a, 'c, 'r, W, C1, C2> {
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// SAFETY: the compiler does not know buffer is still modified after the function returns
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unsafe fn start(&mut self, buffer: &mut [W]) {
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let pc = self.control.regs();
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let pd = self.data.regs();
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let control_ptr = self.control_input.as_ptr() as u32;
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// configure what control channel writes
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// using registers: READ_ADDR, WRITE_ADDR, TRANS_COUNT, CTRL_TRIG
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let mut w = CtrlTrig(0);
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w.set_treq_sel(dreq);
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w.set_treq_sel(self.dreq);
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w.set_data_size(W::size());
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w.set_incr_read(read.is_increase());
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w.set_incr_read(self.read.is_increase());
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w.set_incr_write(true);
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w.set_chain_to(channels.data.number()); // chain disabled by default
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w.set_chain_to(self.data.number()); // chain disabled by default
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w.set_en(true);
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w.set_irq_quiet(false);
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// writing to registers: READ_ADDR, WRITE_ADDR, TRANS_COUNT, CTRL_TRIG
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*self.control_input = [self.read.address(), buffer.as_ptr() as u32, buffer.len() as u32, w.0];
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*control_input = [
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[read.address(), buffer.as_ptr() as u32, buffer.len() as u32, w.0], // first control write
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[0; 4], // Null trigger to stop
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];
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// Configure data channel
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// will be set by control channel
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let pd = channels.data.regs();
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// configure data channel to some values, correct ones will be set by control channel
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pd.read_addr().write_value(0);
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pd.write_addr().write_value(0);
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pd.trans_count().write_value(0);
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pd.al1_ctrl().write_value(0);
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// Configure control channel
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let pc = channels.control.regs();
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// configure control channel
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pc.write_addr().write_value(pd.read_addr().as_ptr() as u32);
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pc.read_addr().write_value(control_input.as_ptr() as u32);
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pc.read_addr().write_value(control_ptr);
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pc.trans_count().write_value(4); // each control input is 4 u32s long
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// trigger control channel
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@ -297,27 +266,154 @@ impl<'a, 'b, 'c, 'r, W: Word, C1: Channel, C2: Channel> ContinuousTransfer<'a, '
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w.set_incr_write(true); // yes, but ring is required
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w.set_ring_sel(true); // wrap write addresses
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w.set_ring_size(4); // 1 << 4 = 16 = 4 * sizeof(u32) bytes
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w.set_chain_to(channels.control.number()); // disable chain, data channel is triggered by write
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w.set_chain_to(self.control.number()); // disable chain, data channel is triggered by write
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w.set_irq_quiet(false);
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w.set_en(true);
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});
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compiler_fence(Ordering::SeqCst);
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// wait until control ran
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self.after_start(buffer.len());
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}
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// SAFETY: the compiler does not know buffer is still modified after the function returns
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async unsafe fn next(&mut self, buffer: &mut [W], auto_restart: bool) -> bool {
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let pc = self.control.regs();
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let pd = self.data.regs();
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let control_ptr = self.control_input.as_ptr() as u32;
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// configure control input to use new buffer
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let mut w = CtrlTrig(0);
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w.set_treq_sel(self.dreq);
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w.set_data_size(W::size());
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w.set_incr_read(self.read.is_increase());
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w.set_incr_write(true);
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w.set_chain_to(self.data.number()); // chain disabled by default
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w.set_en(true);
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w.set_irq_quiet(false);
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*self.control_input = [self.read.address(), buffer.as_ptr() as u32, buffer.len() as u32, w.0];
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// enable chain of running data channel, now we can't change control safely anymore
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// using al1_ctrl to not trigger the channel in case it stopped
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compiler_fence(Ordering::SeqCst);
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pd.al1_ctrl().write_value({
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let mut ctrl = pd.ctrl_trig().read();
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ctrl.set_chain_to(self.control.number());
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ctrl.0
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});
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compiler_fence(Ordering::SeqCst);
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// order is really important in this if statement, otherwise it can happen that the chain still activated
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if pd.ctrl_trig().read().busy() || pc.read_addr().read() > control_ptr {
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poll_fn(|cx: &mut Context<'_>| {
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CHANNEL_WAKERS[self.data.number() as usize].register(cx.waker());
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if pc.read_addr().read() > control_ptr {
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Poll::Ready(())
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} else {
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Poll::Pending
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}
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})
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.await;
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self.after_start(buffer.len());
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true
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} else {
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if auto_restart {
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// trigger control to restart loop
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pc.ctrl_trig().write_value(pc.ctrl_trig().read());
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compiler_fence(Ordering::SeqCst);
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self.after_start(buffer.len());
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}
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false
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}
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}
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fn after_start(&mut self, buffer_len: usize) {
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let control_ptr = self.control_input.as_ptr() as u32;
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let pc = self.control.regs();
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while pc.ctrl_trig().read().busy() {}
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// reset control
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control_input[0] = [0; 4];
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pc.read_addr().write_value(control_input.as_ptr() as u32);
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// don't fail silently, control must not read anything but control_input
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assert!(pc.read_addr().read() == control_ptr + 16);
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read.forward(buffer.len());
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// reset read adress
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pc.read_addr().write_value(control_ptr);
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ContinuousTransfer {
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channels,
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buffer,
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// reset control input, not strictly necessary, but helpful if something goes wrong
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*self.control_input = [0; 4];
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self.read.forward(buffer_len);
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}
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async fn stop(&mut self) {
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// when no longer enabling the chain, the data channel simply stops
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poll_fn(|cx| {
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CHANNEL_WAKERS[self.data.number() as usize].register(cx.waker());
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if self.data.regs().ctrl_trig().read().busy() {
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Poll::Pending
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} else {
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Poll::Ready(())
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}
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})
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.await;
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}
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}
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impl<'a, 'c, 'r, W: Word, C1: Channel, C2: Channel> Drop for InnerContinuous<'a, 'c, 'r, W, C1, C2> {
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fn drop(&mut self) {
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pac::DMA
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.chan_abort()
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.modify(|m| m.set_chan_abort((1 << self.data.number()) | (1 << self.control.number())));
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// wait until both channels are ready again, this should go quite fast so no async used here
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while self.data.regs().ctrl_trig().read().busy() || self.control.regs().ctrl_trig().read().busy() {}
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}
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}
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// contract: if the user has a ContinuousTransfer, it is always running
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// Using InnerContinuous is unsafe, because the rust compiler has no knowledge of the dma
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// channels modifying the buffer. This is why we keep a &mut to the buffer here
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pub struct ContinuousTransfer<'a, 'b, 'c, 'r, W: Word, C1: Channel, C2: Channel> {
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inner: InnerContinuous<'a, 'c, 'r, W, C1, C2>,
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#[allow(dead_code)]
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buffer: &'b mut [W],
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}
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impl<'a, 'b, 'c, 'r, W: Word, C1: Channel, C2: Channel> ContinuousTransfer<'a, 'b, 'c, 'r, W, C1, C2> {
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pub fn start_new(
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ch1: PeripheralRef<'a, C1>,
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ch2: PeripheralRef<'a, C2>,
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control_input: &'c mut [u32; 4],
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buffer: &'b mut [W],
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dreq: TreqSel,
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read: Read<'r, W>,
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) -> ContinuousTransfer<'a, 'b, 'c, 'r, W, C1, C2> {
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let mut inner = InnerContinuous {
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data: ch1,
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control: ch2,
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control_input,
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dreq,
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read,
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};
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// SAFETY: we keep a &mut to buffer around to signal it is being written to
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unsafe { inner.start(buffer) };
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ContinuousTransfer { inner, buffer }
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}
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pub async fn next_or_stop<'new_buf>(
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self,
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buffer: &'new_buf mut [W],
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) -> Option<ContinuousTransfer<'a, 'new_buf, 'c, 'r, W, C1, C2>> {
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let ContinuousTransfer {
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mut inner,
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buffer: _old,
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} = self;
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// SAFETY: we keep a &mut to buffer around to signal it is being written to
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let in_time = unsafe { inner.next(buffer, false).await };
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match in_time {
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true => Some(ContinuousTransfer { inner, buffer }),
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false => None,
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}
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}
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@ -326,104 +422,16 @@ impl<'a, 'b, 'c, 'r, W: Word, C1: Channel, C2: Channel> ContinuousTransfer<'a, '
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buffer: &'new_buf mut [W],
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) -> (ContinuousTransfer<'a, 'new_buf, 'c, 'r, W, C1, C2>, bool) {
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let ContinuousTransfer {
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channels,
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buffer: _old, // is free now, and the compiler knows it
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control_input,
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dreq,
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mut read,
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mut inner,
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buffer: _old,
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} = self;
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let pc = channels.control.regs();
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let pd = channels.data.regs();
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let mut w = CtrlTrig(0);
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w.set_treq_sel(dreq);
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w.set_data_size(W::size());
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w.set_incr_read(read.is_increase());
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w.set_incr_write(true);
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w.set_chain_to(channels.data.number()); // chain disabled by default
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w.set_en(true);
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w.set_irq_quiet(false);
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// configure control
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control_input[0] = [read.address(), buffer.as_ptr() as u32, buffer.len() as u32, w.0];
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// enable chain, now we can't change control safely anymore
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compiler_fence(Ordering::SeqCst);
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pd.al1_ctrl().write_value({
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let mut ctrl = pd.ctrl_trig().read();
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ctrl.set_chain_to(channels.control.number());
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ctrl.0
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});
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if pc.read_addr().read() == control_input.as_ptr() as u32 && pd.ctrl_trig().read().busy() {
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poll_fn(|cx: &mut Context<'_>| {
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CHANNEL_WAKERS[channels.data.number() as usize].register(cx.waker());
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if pc.read_addr().read() == control_input.as_ptr() as u32 + 16 {
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Poll::Ready(())
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} else {
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Poll::Pending
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}
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})
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.await;
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// reset control
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assert!(!pc.ctrl_trig().read().busy());
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control_input[0] = [0; 4];
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pc.read_addr().write_value(control_input.as_ptr() as u32);
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read.forward(buffer.len());
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(
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ContinuousTransfer {
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channels,
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buffer,
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control_input,
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dreq,
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read,
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},
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true,
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)
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} else {
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if pc.read_addr().read() == control_input.as_ptr() as u32 {
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// trigger control to restart loop
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pc.ctrl_trig().write_value(pc.ctrl_trig().read());
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compiler_fence(Ordering::SeqCst);
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}
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// if control read already moved, data has already been activated
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// wait for control to complete
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while pc.ctrl_trig().read().busy() {}
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// reset control
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control_input[0] = [0; 4];
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pc.read_addr().write_value(control_input.as_ptr() as u32);
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read.forward(buffer.len());
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(
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ContinuousTransfer {
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channels,
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control_input,
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buffer,
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dreq,
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read,
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},
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false,
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)
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}
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// SAFETY: we keep a &mut to buffer around to signal it is being written to
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let in_time = unsafe { inner.next(buffer, true).await };
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(ContinuousTransfer { inner, buffer }, in_time)
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}
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pub async fn stop(self) {
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// when no longer enabling the chain, data simply stops
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poll_fn(|cx| {
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CHANNEL_WAKERS[self.channels.data.number() as usize].register(cx.waker());
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if self.channels.data.regs().ctrl_trig().read().busy() {
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Poll::Pending
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} else {
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Poll::Ready(())
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}
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})
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.await;
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pub async fn stop(mut self) {
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self.inner.stop().await;
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}
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pub fn abort(self) {} // drop channels
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Reference in New Issue
Block a user