Update stm32-metapac, includes chiptool changes to use real Rust enums now.
This commit is contained in:
@ -36,7 +36,7 @@ impl<'d, T: Instance> super::Rtc<'d, T> {
|
||||
#[cfg(rtc_v2wb)]
|
||||
let rtcsel = reg.rtcsel();
|
||||
#[cfg(not(rtc_v2wb))]
|
||||
let rtcsel = reg.rtcsel().0;
|
||||
let rtcsel = reg.rtcsel().to_bits();
|
||||
|
||||
if !reg.rtcen() || rtcsel != clock_config {
|
||||
#[cfg(not(any(rtc_v2l0, rtc_v2l1)))]
|
||||
@ -54,7 +54,7 @@ impl<'d, T: Instance> super::Rtc<'d, T> {
|
||||
|
||||
// Select RTC source
|
||||
#[cfg(not(rtc_v2wb))]
|
||||
w.set_rtcsel(Rtcsel(clock_config));
|
||||
w.set_rtcsel(Rtcsel::from_bits(clock_config));
|
||||
#[cfg(rtc_v2wb)]
|
||||
w.set_rtcsel(clock_config);
|
||||
w.set_rtcen(true);
|
||||
|
@ -26,7 +26,7 @@ impl<'d, T: Instance> super::Rtc<'d, T> {
|
||||
|
||||
let config_rtcsel = rtc_config.clock_config as u8;
|
||||
#[cfg(not(any(rcc_wl5, rcc_wle)))]
|
||||
let config_rtcsel = crate::pac::rcc::vals::Rtcsel(config_rtcsel);
|
||||
let config_rtcsel = crate::pac::rcc::vals::Rtcsel::from_bits(config_rtcsel);
|
||||
|
||||
if !reg.rtcen() || reg.rtcsel() != config_rtcsel {
|
||||
crate::pac::RCC.bdcr().modify(|w| w.set_bdrst(true));
|
||||
|
Reference in New Issue
Block a user