Address review comments
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@ -100,6 +100,13 @@ impl BootLoader {
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trace!("msp = {=u32:x}, rv = {=u32:x}", msp, rv);
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trace!("msp = {=u32:x}, rv = {=u32:x}", msp, rv);
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// These instructions perform the following operations:
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//
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// * Modify control register to use MSP as stack pointer (clear spsel bit)
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// * Synchronize instruction barrier
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// * Initialize stack pointer (0x1000)
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// * Set link register to not return (0xFF)
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// * Jump to softdevice reset vector
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core::arch::asm!(
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core::arch::asm!(
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"mrs {tmp}, CONTROL",
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"mrs {tmp}, CONTROL",
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"bics {tmp}, {spsel}",
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"bics {tmp}, {spsel}",
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@ -12,6 +12,9 @@ use embassy_nrf::nvmc::Nvmc;
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#[entry]
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#[entry]
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fn main() -> ! {
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fn main() -> ! {
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let p = embassy_nrf::init(Default::default());
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let p = embassy_nrf::init(Default::default());
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// Uncomment this if you are debugging the bootloader with debugger/RTT attached,
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// as it prevents a hard fault when accessing flash 'too early' after boot.
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/*
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/*
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for i in 0..10000000 {
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for i in 0..10000000 {
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cortex_m::asm::nop();
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cortex_m::asm::nop();
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@ -40,7 +43,7 @@ unsafe fn DefaultHandler(_: i16) -> ! {
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#[panic_handler]
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#[panic_handler]
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fn panic(_info: &core::panic::PanicInfo) -> ! {
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fn panic(_info: &core::panic::PanicInfo) -> ! {
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unsafe {
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unsafe {
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core::arch::asm!("udf #0");
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cortex_m::asm::udf();
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core::hint::unreachable_unchecked();
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core::hint::unreachable_unchecked();
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}
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}
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}
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}
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