nrf/pac: reeport s and ns peripherals always independently of the current mode.
You sometimes need this, for example for using nrf91 modem from S mode you need to acces IPC_NS.
This commit is contained in:
parent
f0497039ed
commit
ea0e83a7f9
@ -6,10 +6,13 @@ pub mod pac {
|
||||
// To avoid cfg spam, we remove _ns or _s suffixes here.
|
||||
|
||||
pub use nrf5340_app_pac::NVIC_PRIO_BITS;
|
||||
|
||||
|
||||
#[cfg(feature="rt")]
|
||||
#[doc(no_inline)]
|
||||
pub use nrf5340_app_pac::interrupt;
|
||||
|
||||
#[doc(no_inline)]
|
||||
pub use nrf5340_app_pac::{
|
||||
interrupt,
|
||||
Interrupt,
|
||||
Peripherals,
|
||||
|
||||
@ -60,156 +63,167 @@ pub mod pac {
|
||||
wdt0_ns as wdt0,
|
||||
};
|
||||
|
||||
#[cfg(feature = "nrf5340-app-ns")]
|
||||
#[doc(no_inline)]
|
||||
pub use nrf5340_app_pac::{
|
||||
CLOCK_NS as CLOCK,
|
||||
COMP_NS as COMP,
|
||||
CTRLAP_NS as CTRLAP,
|
||||
DCNF_NS as DCNF,
|
||||
DPPIC_NS as DPPIC,
|
||||
EGU0_NS as EGU0,
|
||||
EGU1_NS as EGU1,
|
||||
EGU2_NS as EGU2,
|
||||
EGU3_NS as EGU3,
|
||||
EGU4_NS as EGU4,
|
||||
EGU5_NS as EGU5,
|
||||
FPU_NS as FPU,
|
||||
GPIOTE1_NS as GPIOTE1,
|
||||
I2S0_NS as I2S0,
|
||||
IPC_NS as IPC,
|
||||
KMU_NS as KMU,
|
||||
LPCOMP_NS as LPCOMP,
|
||||
MUTEX_NS as MUTEX,
|
||||
NFCT_NS as NFCT,
|
||||
NVMC_NS as NVMC,
|
||||
OSCILLATORS_NS as OSCILLATORS,
|
||||
P0_NS as P0,
|
||||
P1_NS as P1,
|
||||
PDM0_NS as PDM0,
|
||||
POWER_NS as POWER,
|
||||
PWM0_NS as PWM0,
|
||||
PWM1_NS as PWM1,
|
||||
PWM2_NS as PWM2,
|
||||
PWM3_NS as PWM3,
|
||||
QDEC0_NS as QDEC0,
|
||||
QDEC1_NS as QDEC1,
|
||||
QSPI_NS as QSPI,
|
||||
REGULATORS_NS as REGULATORS,
|
||||
RESET_NS as RESET,
|
||||
RTC0_NS as RTC0,
|
||||
RTC1_NS as RTC1,
|
||||
SAADC_NS as SAADC,
|
||||
SPIM0_NS as SPIM0,
|
||||
SPIM1_NS as SPIM1,
|
||||
SPIM2_NS as SPIM2,
|
||||
SPIM3_NS as SPIM3,
|
||||
SPIM4_NS as SPIM4,
|
||||
SPIS0_NS as SPIS0,
|
||||
SPIS1_NS as SPIS1,
|
||||
SPIS2_NS as SPIS2,
|
||||
SPIS3_NS as SPIS3,
|
||||
TIMER0_NS as TIMER0,
|
||||
TIMER1_NS as TIMER1,
|
||||
TIMER2_NS as TIMER2,
|
||||
TWIM0_NS as TWIM0,
|
||||
TWIM1_NS as TWIM1,
|
||||
TWIM2_NS as TWIM2,
|
||||
TWIM3_NS as TWIM3,
|
||||
TWIS0_NS as TWIS0,
|
||||
TWIS1_NS as TWIS1,
|
||||
TWIS2_NS as TWIS2,
|
||||
TWIS3_NS as TWIS3,
|
||||
UARTE0_NS as UARTE0,
|
||||
UARTE1_NS as UARTE1,
|
||||
UARTE2_NS as UARTE2,
|
||||
UARTE3_NS as UARTE3,
|
||||
USBD_NS as USBD,
|
||||
USBREGULATOR_NS as USBREGULATOR,
|
||||
VMC_NS as VMC,
|
||||
WDT0_NS as WDT0,
|
||||
WDT1_NS as WDT1,
|
||||
};
|
||||
/// Non-Secure mode (NS) peripherals
|
||||
pub mod ns {
|
||||
#[cfg(feature = "nrf5340-app-ns")]
|
||||
#[doc(no_inline)]
|
||||
pub use nrf5340_app_pac::{
|
||||
CLOCK_NS as CLOCK,
|
||||
COMP_NS as COMP,
|
||||
CTRLAP_NS as CTRLAP,
|
||||
DCNF_NS as DCNF,
|
||||
DPPIC_NS as DPPIC,
|
||||
EGU0_NS as EGU0,
|
||||
EGU1_NS as EGU1,
|
||||
EGU2_NS as EGU2,
|
||||
EGU3_NS as EGU3,
|
||||
EGU4_NS as EGU4,
|
||||
EGU5_NS as EGU5,
|
||||
FPU_NS as FPU,
|
||||
GPIOTE1_NS as GPIOTE1,
|
||||
I2S0_NS as I2S0,
|
||||
IPC_NS as IPC,
|
||||
KMU_NS as KMU,
|
||||
LPCOMP_NS as LPCOMP,
|
||||
MUTEX_NS as MUTEX,
|
||||
NFCT_NS as NFCT,
|
||||
NVMC_NS as NVMC,
|
||||
OSCILLATORS_NS as OSCILLATORS,
|
||||
P0_NS as P0,
|
||||
P1_NS as P1,
|
||||
PDM0_NS as PDM0,
|
||||
POWER_NS as POWER,
|
||||
PWM0_NS as PWM0,
|
||||
PWM1_NS as PWM1,
|
||||
PWM2_NS as PWM2,
|
||||
PWM3_NS as PWM3,
|
||||
QDEC0_NS as QDEC0,
|
||||
QDEC1_NS as QDEC1,
|
||||
QSPI_NS as QSPI,
|
||||
REGULATORS_NS as REGULATORS,
|
||||
RESET_NS as RESET,
|
||||
RTC0_NS as RTC0,
|
||||
RTC1_NS as RTC1,
|
||||
SAADC_NS as SAADC,
|
||||
SPIM0_NS as SPIM0,
|
||||
SPIM1_NS as SPIM1,
|
||||
SPIM2_NS as SPIM2,
|
||||
SPIM3_NS as SPIM3,
|
||||
SPIM4_NS as SPIM4,
|
||||
SPIS0_NS as SPIS0,
|
||||
SPIS1_NS as SPIS1,
|
||||
SPIS2_NS as SPIS2,
|
||||
SPIS3_NS as SPIS3,
|
||||
TIMER0_NS as TIMER0,
|
||||
TIMER1_NS as TIMER1,
|
||||
TIMER2_NS as TIMER2,
|
||||
TWIM0_NS as TWIM0,
|
||||
TWIM1_NS as TWIM1,
|
||||
TWIM2_NS as TWIM2,
|
||||
TWIM3_NS as TWIM3,
|
||||
TWIS0_NS as TWIS0,
|
||||
TWIS1_NS as TWIS1,
|
||||
TWIS2_NS as TWIS2,
|
||||
TWIS3_NS as TWIS3,
|
||||
UARTE0_NS as UARTE0,
|
||||
UARTE1_NS as UARTE1,
|
||||
UARTE2_NS as UARTE2,
|
||||
UARTE3_NS as UARTE3,
|
||||
USBD_NS as USBD,
|
||||
USBREGULATOR_NS as USBREGULATOR,
|
||||
VMC_NS as VMC,
|
||||
WDT0_NS as WDT0,
|
||||
WDT1_NS as WDT1,
|
||||
};
|
||||
}
|
||||
|
||||
#[cfg(feature = "nrf5340-app-s")]
|
||||
#[doc(no_inline)]
|
||||
pub use nrf5340_app_pac::{
|
||||
CACHEDATA_S as CACHEDATA,
|
||||
CACHEINFO_S as CACHEINFO,
|
||||
CACHE_S as CACHE,
|
||||
CLOCK_S as CLOCK,
|
||||
COMP_S as COMP,
|
||||
CRYPTOCELL_S as CRYPTOCELL,
|
||||
CTI_S as CTI,
|
||||
CTRLAP_S as CTRLAP,
|
||||
DCNF_S as DCNF,
|
||||
DPPIC_S as DPPIC,
|
||||
EGU0_S as EGU0,
|
||||
EGU1_S as EGU1,
|
||||
EGU2_S as EGU2,
|
||||
EGU3_S as EGU3,
|
||||
EGU4_S as EGU4,
|
||||
EGU5_S as EGU5,
|
||||
FICR_S as FICR,
|
||||
FPU_S as FPU,
|
||||
GPIOTE0_S as GPIOTE0,
|
||||
I2S0_S as I2S0,
|
||||
IPC_S as IPC,
|
||||
KMU_S as KMU,
|
||||
LPCOMP_S as LPCOMP,
|
||||
MUTEX_S as MUTEX,
|
||||
NFCT_S as NFCT,
|
||||
NVMC_S as NVMC,
|
||||
OSCILLATORS_S as OSCILLATORS,
|
||||
P0_S as P0,
|
||||
P1_S as P1,
|
||||
PDM0_S as PDM0,
|
||||
POWER_S as POWER,
|
||||
PWM0_S as PWM0,
|
||||
PWM1_S as PWM1,
|
||||
PWM2_S as PWM2,
|
||||
PWM3_S as PWM3,
|
||||
QDEC0_S as QDEC0,
|
||||
QDEC1_S as QDEC1,
|
||||
QSPI_S as QSPI,
|
||||
REGULATORS_S as REGULATORS,
|
||||
RESET_S as RESET,
|
||||
RTC0_S as RTC0,
|
||||
RTC1_S as RTC1,
|
||||
SAADC_S as SAADC,
|
||||
SPIM0_S as SPIM0,
|
||||
SPIM1_S as SPIM1,
|
||||
SPIM2_S as SPIM2,
|
||||
SPIM3_S as SPIM3,
|
||||
SPIM4_S as SPIM4,
|
||||
SPIS0_S as SPIS0,
|
||||
SPIS1_S as SPIS1,
|
||||
SPIS2_S as SPIS2,
|
||||
SPIS3_S as SPIS3,
|
||||
SPU_S as SPU,
|
||||
TAD_S as TAD,
|
||||
TIMER0_S as TIMER0,
|
||||
TIMER1_S as TIMER1,
|
||||
TIMER2_S as TIMER2,
|
||||
TWIM0_S as TWIM0,
|
||||
TWIM1_S as TWIM1,
|
||||
TWIM2_S as TWIM2,
|
||||
TWIM3_S as TWIM3,
|
||||
TWIS0_S as TWIS0,
|
||||
TWIS1_S as TWIS1,
|
||||
TWIS2_S as TWIS2,
|
||||
TWIS3_S as TWIS3,
|
||||
UARTE0_S as UARTE0,
|
||||
UARTE1_S as UARTE1,
|
||||
UARTE2_S as UARTE2,
|
||||
UARTE3_S as UARTE3,
|
||||
UICR_S as UICR,
|
||||
USBD_S as USBD,
|
||||
USBREGULATOR_S as USBREGULATOR,
|
||||
VMC_S as VMC,
|
||||
WDT0_S as WDT0,
|
||||
WDT1_S as WDT1,
|
||||
};
|
||||
/// Secure mode (S) peripherals
|
||||
pub mod s {
|
||||
#[cfg(feature = "nrf5340-app-s")]
|
||||
#[doc(no_inline)]
|
||||
pub use nrf5340_app_pac::{
|
||||
CACHEDATA_S as CACHEDATA,
|
||||
CACHEINFO_S as CACHEINFO,
|
||||
CACHE_S as CACHE,
|
||||
CLOCK_S as CLOCK,
|
||||
COMP_S as COMP,
|
||||
CRYPTOCELL_S as CRYPTOCELL,
|
||||
CTI_S as CTI,
|
||||
CTRLAP_S as CTRLAP,
|
||||
DCNF_S as DCNF,
|
||||
DPPIC_S as DPPIC,
|
||||
EGU0_S as EGU0,
|
||||
EGU1_S as EGU1,
|
||||
EGU2_S as EGU2,
|
||||
EGU3_S as EGU3,
|
||||
EGU4_S as EGU4,
|
||||
EGU5_S as EGU5,
|
||||
FICR_S as FICR,
|
||||
FPU_S as FPU,
|
||||
GPIOTE0_S as GPIOTE0,
|
||||
I2S0_S as I2S0,
|
||||
IPC_S as IPC,
|
||||
KMU_S as KMU,
|
||||
LPCOMP_S as LPCOMP,
|
||||
MUTEX_S as MUTEX,
|
||||
NFCT_S as NFCT,
|
||||
NVMC_S as NVMC,
|
||||
OSCILLATORS_S as OSCILLATORS,
|
||||
P0_S as P0,
|
||||
P1_S as P1,
|
||||
PDM0_S as PDM0,
|
||||
POWER_S as POWER,
|
||||
PWM0_S as PWM0,
|
||||
PWM1_S as PWM1,
|
||||
PWM2_S as PWM2,
|
||||
PWM3_S as PWM3,
|
||||
QDEC0_S as QDEC0,
|
||||
QDEC1_S as QDEC1,
|
||||
QSPI_S as QSPI,
|
||||
REGULATORS_S as REGULATORS,
|
||||
RESET_S as RESET,
|
||||
RTC0_S as RTC0,
|
||||
RTC1_S as RTC1,
|
||||
SAADC_S as SAADC,
|
||||
SPIM0_S as SPIM0,
|
||||
SPIM1_S as SPIM1,
|
||||
SPIM2_S as SPIM2,
|
||||
SPIM3_S as SPIM3,
|
||||
SPIM4_S as SPIM4,
|
||||
SPIS0_S as SPIS0,
|
||||
SPIS1_S as SPIS1,
|
||||
SPIS2_S as SPIS2,
|
||||
SPIS3_S as SPIS3,
|
||||
SPU_S as SPU,
|
||||
TAD_S as TAD,
|
||||
TIMER0_S as TIMER0,
|
||||
TIMER1_S as TIMER1,
|
||||
TIMER2_S as TIMER2,
|
||||
TWIM0_S as TWIM0,
|
||||
TWIM1_S as TWIM1,
|
||||
TWIM2_S as TWIM2,
|
||||
TWIM3_S as TWIM3,
|
||||
TWIS0_S as TWIS0,
|
||||
TWIS1_S as TWIS1,
|
||||
TWIS2_S as TWIS2,
|
||||
TWIS3_S as TWIS3,
|
||||
UARTE0_S as UARTE0,
|
||||
UARTE1_S as UARTE1,
|
||||
UARTE2_S as UARTE2,
|
||||
UARTE3_S as UARTE3,
|
||||
UICR_S as UICR,
|
||||
USBD_S as USBD,
|
||||
USBREGULATOR_S as USBREGULATOR,
|
||||
VMC_S as VMC,
|
||||
WDT0_S as WDT0,
|
||||
WDT1_S as WDT1,
|
||||
};
|
||||
}
|
||||
|
||||
#[cfg(feature = "_ns")]
|
||||
pub use ns::*;
|
||||
#[cfg(feature = "_s")]
|
||||
pub use s::*;
|
||||
}
|
||||
|
||||
/// The maximum buffer size that the EasyDMA can send/recv in one operation.
|
||||
|
@ -7,9 +7,12 @@ pub mod pac {
|
||||
|
||||
pub use nrf5340_net_pac::NVIC_PRIO_BITS;
|
||||
|
||||
#[cfg(feature="rt")]
|
||||
#[doc(no_inline)]
|
||||
pub use nrf5340_net_pac::interrupt;
|
||||
|
||||
#[doc(no_inline)]
|
||||
pub use nrf5340_net_pac::{
|
||||
interrupt,
|
||||
Interrupt,
|
||||
Peripherals,
|
||||
|
||||
|
@ -7,9 +7,12 @@ pub mod pac {
|
||||
|
||||
pub use nrf9160_pac::NVIC_PRIO_BITS;
|
||||
|
||||
#[cfg(feature="rt")]
|
||||
#[doc(no_inline)]
|
||||
pub use nrf9160_pac::interrupt;
|
||||
|
||||
#[doc(no_inline)]
|
||||
pub use nrf9160_pac::{
|
||||
interrupt,
|
||||
Interrupt,
|
||||
|
||||
cc_host_rgf_s as cc_host_rgf,
|
||||
@ -45,122 +48,131 @@ pub mod pac {
|
||||
wdt_ns as wdt,
|
||||
};
|
||||
|
||||
#[cfg(feature = "nrf9160-ns")]
|
||||
#[doc(no_inline)]
|
||||
pub use nrf9160_pac::{
|
||||
CLOCK_NS as CLOCK,
|
||||
DPPIC_NS as DPPIC,
|
||||
EGU0_NS as EGU0,
|
||||
EGU1_NS as EGU1,
|
||||
EGU2_NS as EGU2,
|
||||
EGU3_NS as EGU3,
|
||||
EGU4_NS as EGU4,
|
||||
EGU5_NS as EGU5,
|
||||
FPU_NS as FPU,
|
||||
GPIOTE1_NS as GPIOTE1,
|
||||
I2S_NS as I2S,
|
||||
IPC_NS as IPC,
|
||||
KMU_NS as KMU,
|
||||
NVMC_NS as NVMC,
|
||||
P0_NS as P0,
|
||||
PDM_NS as PDM,
|
||||
POWER_NS as POWER,
|
||||
PWM0_NS as PWM0,
|
||||
PWM1_NS as PWM1,
|
||||
PWM2_NS as PWM2,
|
||||
PWM3_NS as PWM3,
|
||||
REGULATORS_NS as REGULATORS,
|
||||
RTC0_NS as RTC0,
|
||||
RTC1_NS as RTC1,
|
||||
SAADC_NS as SAADC,
|
||||
SPIM0_NS as SPIM0,
|
||||
SPIM1_NS as SPIM1,
|
||||
SPIM2_NS as SPIM2,
|
||||
SPIM3_NS as SPIM3,
|
||||
SPIS0_NS as SPIS0,
|
||||
SPIS1_NS as SPIS1,
|
||||
SPIS2_NS as SPIS2,
|
||||
SPIS3_NS as SPIS3,
|
||||
TIMER0_NS as TIMER0,
|
||||
TIMER1_NS as TIMER1,
|
||||
TIMER2_NS as TIMER2,
|
||||
TWIM0_NS as TWIM0,
|
||||
TWIM1_NS as TWIM1,
|
||||
TWIM2_NS as TWIM2,
|
||||
TWIM3_NS as TWIM3,
|
||||
TWIS0_NS as TWIS0,
|
||||
TWIS1_NS as TWIS1,
|
||||
TWIS2_NS as TWIS2,
|
||||
TWIS3_NS as TWIS3,
|
||||
UARTE0_NS as UARTE0,
|
||||
UARTE1_NS as UARTE1,
|
||||
UARTE2_NS as UARTE2,
|
||||
UARTE3_NS as UARTE3,
|
||||
VMC_NS as VMC,
|
||||
WDT_NS as WDT,
|
||||
};
|
||||
/// Non-Secure mode (NS) peripherals
|
||||
pub mod ns {
|
||||
#[doc(no_inline)]
|
||||
pub use nrf9160_pac::{
|
||||
CLOCK_NS as CLOCK,
|
||||
DPPIC_NS as DPPIC,
|
||||
EGU0_NS as EGU0,
|
||||
EGU1_NS as EGU1,
|
||||
EGU2_NS as EGU2,
|
||||
EGU3_NS as EGU3,
|
||||
EGU4_NS as EGU4,
|
||||
EGU5_NS as EGU5,
|
||||
FPU_NS as FPU,
|
||||
GPIOTE1_NS as GPIOTE1,
|
||||
I2S_NS as I2S,
|
||||
IPC_NS as IPC,
|
||||
KMU_NS as KMU,
|
||||
NVMC_NS as NVMC,
|
||||
P0_NS as P0,
|
||||
PDM_NS as PDM,
|
||||
POWER_NS as POWER,
|
||||
PWM0_NS as PWM0,
|
||||
PWM1_NS as PWM1,
|
||||
PWM2_NS as PWM2,
|
||||
PWM3_NS as PWM3,
|
||||
REGULATORS_NS as REGULATORS,
|
||||
RTC0_NS as RTC0,
|
||||
RTC1_NS as RTC1,
|
||||
SAADC_NS as SAADC,
|
||||
SPIM0_NS as SPIM0,
|
||||
SPIM1_NS as SPIM1,
|
||||
SPIM2_NS as SPIM2,
|
||||
SPIM3_NS as SPIM3,
|
||||
SPIS0_NS as SPIS0,
|
||||
SPIS1_NS as SPIS1,
|
||||
SPIS2_NS as SPIS2,
|
||||
SPIS3_NS as SPIS3,
|
||||
TIMER0_NS as TIMER0,
|
||||
TIMER1_NS as TIMER1,
|
||||
TIMER2_NS as TIMER2,
|
||||
TWIM0_NS as TWIM0,
|
||||
TWIM1_NS as TWIM1,
|
||||
TWIM2_NS as TWIM2,
|
||||
TWIM3_NS as TWIM3,
|
||||
TWIS0_NS as TWIS0,
|
||||
TWIS1_NS as TWIS1,
|
||||
TWIS2_NS as TWIS2,
|
||||
TWIS3_NS as TWIS3,
|
||||
UARTE0_NS as UARTE0,
|
||||
UARTE1_NS as UARTE1,
|
||||
UARTE2_NS as UARTE2,
|
||||
UARTE3_NS as UARTE3,
|
||||
VMC_NS as VMC,
|
||||
WDT_NS as WDT,
|
||||
};
|
||||
}
|
||||
|
||||
#[cfg(feature = "nrf9160-s")]
|
||||
#[doc(no_inline)]
|
||||
pub use nrf9160_pac::{
|
||||
CC_HOST_RGF_S as CC_HOST_RGF,
|
||||
CLOCK_S as CLOCK,
|
||||
CRYPTOCELL_S as CRYPTOCELL,
|
||||
CTRL_AP_PERI_S as CTRL_AP_PERI,
|
||||
DPPIC_S as DPPIC,
|
||||
EGU0_S as EGU0,
|
||||
EGU1_S as EGU1,
|
||||
EGU2_S as EGU2,
|
||||
EGU3_S as EGU3,
|
||||
EGU4_S as EGU4,
|
||||
EGU5_S as EGU5,
|
||||
FICR_S as FICR,
|
||||
FPU_S as FPU,
|
||||
GPIOTE0_S as GPIOTE0,
|
||||
I2S_S as I2S,
|
||||
IPC_S as IPC,
|
||||
KMU_S as KMU,
|
||||
NVMC_S as NVMC,
|
||||
P0_S as P0,
|
||||
PDM_S as PDM,
|
||||
POWER_S as POWER,
|
||||
PWM0_S as PWM0,
|
||||
PWM1_S as PWM1,
|
||||
PWM2_S as PWM2,
|
||||
PWM3_S as PWM3,
|
||||
REGULATORS_S as REGULATORS,
|
||||
RTC0_S as RTC0,
|
||||
RTC1_S as RTC1,
|
||||
SAADC_S as SAADC,
|
||||
SPIM0_S as SPIM0,
|
||||
SPIM1_S as SPIM1,
|
||||
SPIM2_S as SPIM2,
|
||||
SPIM3_S as SPIM3,
|
||||
SPIS0_S as SPIS0,
|
||||
SPIS1_S as SPIS1,
|
||||
SPIS2_S as SPIS2,
|
||||
SPIS3_S as SPIS3,
|
||||
SPU_S as SPU,
|
||||
TAD_S as TAD,
|
||||
TIMER0_S as TIMER0,
|
||||
TIMER1_S as TIMER1,
|
||||
TIMER2_S as TIMER2,
|
||||
TWIM0_S as TWIM0,
|
||||
TWIM1_S as TWIM1,
|
||||
TWIM2_S as TWIM2,
|
||||
TWIM3_S as TWIM3,
|
||||
TWIS0_S as TWIS0,
|
||||
TWIS1_S as TWIS1,
|
||||
TWIS2_S as TWIS2,
|
||||
TWIS3_S as TWIS3,
|
||||
UARTE0_S as UARTE0,
|
||||
UARTE1_S as UARTE1,
|
||||
UARTE2_S as UARTE2,
|
||||
UARTE3_S as UARTE3,
|
||||
UICR_S as UICR,
|
||||
VMC_S as VMC,
|
||||
WDT_S as WDT,
|
||||
};
|
||||
/// Secure mode (S) peripherals
|
||||
pub mod s {
|
||||
#[doc(no_inline)]
|
||||
pub use nrf9160_pac::{
|
||||
CC_HOST_RGF_S as CC_HOST_RGF,
|
||||
CLOCK_S as CLOCK,
|
||||
CRYPTOCELL_S as CRYPTOCELL,
|
||||
CTRL_AP_PERI_S as CTRL_AP_PERI,
|
||||
DPPIC_S as DPPIC,
|
||||
EGU0_S as EGU0,
|
||||
EGU1_S as EGU1,
|
||||
EGU2_S as EGU2,
|
||||
EGU3_S as EGU3,
|
||||
EGU4_S as EGU4,
|
||||
EGU5_S as EGU5,
|
||||
FICR_S as FICR,
|
||||
FPU_S as FPU,
|
||||
GPIOTE0_S as GPIOTE0,
|
||||
I2S_S as I2S,
|
||||
IPC_S as IPC,
|
||||
KMU_S as KMU,
|
||||
NVMC_S as NVMC,
|
||||
P0_S as P0,
|
||||
PDM_S as PDM,
|
||||
POWER_S as POWER,
|
||||
PWM0_S as PWM0,
|
||||
PWM1_S as PWM1,
|
||||
PWM2_S as PWM2,
|
||||
PWM3_S as PWM3,
|
||||
REGULATORS_S as REGULATORS,
|
||||
RTC0_S as RTC0,
|
||||
RTC1_S as RTC1,
|
||||
SAADC_S as SAADC,
|
||||
SPIM0_S as SPIM0,
|
||||
SPIM1_S as SPIM1,
|
||||
SPIM2_S as SPIM2,
|
||||
SPIM3_S as SPIM3,
|
||||
SPIS0_S as SPIS0,
|
||||
SPIS1_S as SPIS1,
|
||||
SPIS2_S as SPIS2,
|
||||
SPIS3_S as SPIS3,
|
||||
SPU_S as SPU,
|
||||
TAD_S as TAD,
|
||||
TIMER0_S as TIMER0,
|
||||
TIMER1_S as TIMER1,
|
||||
TIMER2_S as TIMER2,
|
||||
TWIM0_S as TWIM0,
|
||||
TWIM1_S as TWIM1,
|
||||
TWIM2_S as TWIM2,
|
||||
TWIM3_S as TWIM3,
|
||||
TWIS0_S as TWIS0,
|
||||
TWIS1_S as TWIS1,
|
||||
TWIS2_S as TWIS2,
|
||||
TWIS3_S as TWIS3,
|
||||
UARTE0_S as UARTE0,
|
||||
UARTE1_S as UARTE1,
|
||||
UARTE2_S as UARTE2,
|
||||
UARTE3_S as UARTE3,
|
||||
UICR_S as UICR,
|
||||
VMC_S as VMC,
|
||||
WDT_S as WDT,
|
||||
};
|
||||
}
|
||||
|
||||
#[cfg(feature = "_ns")]
|
||||
pub use ns::*;
|
||||
#[cfg(feature = "_s")]
|
||||
pub use s::*;
|
||||
}
|
||||
|
||||
/// The maximum buffer size that the EasyDMA can send/recv in one operation.
|
||||
|
Loading…
Reference in New Issue
Block a user