embassy-rp: Add basic ADC module
This commit is contained in:
178
embassy-rp/src/adc.rs
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178
embassy-rp/src/adc.rs
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@ -0,0 +1,178 @@
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use core::future::poll_fn;
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use core::marker::PhantomData;
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use core::sync::atomic::{compiler_fence, Ordering};
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use core::task::Poll;
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use embassy_hal_common::into_ref;
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use embassy_sync::waitqueue::AtomicWaker;
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use embedded_hal_02::adc::{Channel, OneShot};
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use crate::interrupt::{self, InterruptExt};
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use crate::peripherals::ADC;
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use crate::{pac, peripherals, Peripheral};
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static WAKER: AtomicWaker = AtomicWaker::new();
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#[derive(Debug, Clone, Copy, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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#[non_exhaustive]
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pub enum Error {
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// No errors for now
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}
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#[non_exhaustive]
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pub struct Config {}
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impl Default for Config {
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fn default() -> Self {
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Self {}
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}
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}
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pub struct Adc<'d> {
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phantom: PhantomData<&'d ADC>,
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}
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impl<'d> Adc<'d> {
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#[inline]
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fn regs() -> pac::adc::Adc {
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pac::ADC
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}
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#[inline]
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fn reset() -> pac::resets::regs::Peripherals {
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let mut ret = pac::resets::regs::Peripherals::default();
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ret.set_adc(true);
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ret
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}
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pub fn new(
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_inner: impl Peripheral<P = ADC> + 'd,
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irq: impl Peripheral<P = interrupt::ADC_IRQ_FIFO> + 'd,
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_config: Config,
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) -> Self {
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into_ref!(irq);
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unsafe {
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let reset = Self::reset();
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crate::reset::reset(reset);
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crate::reset::unreset_wait(reset);
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let r = Self::regs();
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// Enable ADC
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r.cs().write(|w| w.set_en(true));
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// Wait for ADC ready
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while !r.cs().read().ready() {}
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}
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// Setup IRQ
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irq.disable();
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irq.set_handler(|_| unsafe {
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let r = Self::regs();
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r.inte().modify(|w| w.set_fifo(false));
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WAKER.wake();
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});
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irq.unpend();
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irq.enable();
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Self { phantom: PhantomData }
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}
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async fn wait_for_ready() {
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let r = Self::regs();
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unsafe {
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r.inte().modify(|w| w.set_fifo(true));
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compiler_fence(Ordering::SeqCst);
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poll_fn(|cx| {
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WAKER.register(cx.waker());
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if r.cs().read().ready() {
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return Poll::Ready(());
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}
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Poll::Pending
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})
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.await;
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}
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}
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pub async fn read<PIN: Channel<Adc<'d>, ID = u8>>(&mut self, _pin: &mut PIN) -> u16 {
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let r = Self::regs();
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unsafe {
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r.cs().modify(|w| {
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w.set_ainsel(PIN::channel());
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w.set_start_once(true)
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});
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Self::wait_for_ready().await;
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r.result().read().result().into()
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}
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}
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pub async fn read_temperature(&mut self) -> u16 {
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let r = Self::regs();
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unsafe {
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r.cs().modify(|w| w.set_ts_en(true));
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if !r.cs().read().ready() {
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Self::wait_for_ready().await;
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}
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r.cs().modify(|w| {
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w.set_ainsel(4);
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w.set_start_once(true)
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});
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Self::wait_for_ready().await;
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r.result().read().result().into()
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}
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}
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pub fn blocking_read<PIN: Channel<Adc<'d>, ID = u8>>(&mut self, _pin: &mut PIN) -> u16 {
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let r = Self::regs();
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let ch = PIN::channel();
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unsafe {
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if ch == 4 {
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r.cs().modify(|w| w.set_ts_en(true))
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}
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while !r.cs().read().ready() {}
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r.cs().modify(|w| {
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w.set_ainsel(ch);
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w.set_start_once(true)
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});
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while !r.cs().read().ready() {}
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r.result().read().result().into()
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}
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}
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pub fn blocking_read_temperature(&mut self) -> u16 {
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let r = Self::regs();
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unsafe {
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r.cs().modify(|w| w.set_ts_en(true));
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while !r.cs().read().ready() {}
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r.cs().modify(|w| {
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w.set_ainsel(4);
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w.set_start_once(true)
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});
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while !r.cs().read().ready() {}
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r.result().read().result().into()
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}
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}
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}
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macro_rules! impl_pin {
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($pin:ident, $channel:expr) => {
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impl Channel<Adc<'static>> for peripherals::$pin {
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type ID = u8;
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fn channel() -> u8 {
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$channel
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}
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}
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};
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}
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impl_pin!(PIN_26, 0);
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impl_pin!(PIN_27, 1);
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impl_pin!(PIN_28, 2);
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impl_pin!(PIN_29, 3);
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impl<WORD, PIN> OneShot<Adc<'static>, WORD, PIN> for Adc<'static>
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where
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WORD: From<u16>,
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PIN: Channel<Adc<'static>, ID = u8>,
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{
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type Error = ();
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fn read(&mut self, pin: &mut PIN) -> nb::Result<WORD, Self::Error> {
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Ok(self.blocking_read(pin).into())
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}
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}
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@ -6,6 +6,7 @@ pub(crate) mod fmt;
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mod intrinsics;
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pub mod adc;
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pub mod dma;
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pub mod gpio;
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pub mod i2c;
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@ -98,6 +99,8 @@ embassy_hal_common::peripherals! {
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RTC,
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FLASH,
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ADC,
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}
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#[link_section = ".boot2"]
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