nrf/qspi: update to new api
This commit is contained in:
Dario Nieuwenhuis
parent
16bb6fd6ac
commit
ec7309962a
@ -6,12 +6,12 @@
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#[path = "../example_common.rs"]
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mod example_common;
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use embassy_nrf::peripherals::Peripherals;
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use example_common::*;
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use cortex_m_rt::entry;
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use defmt::{assert_eq, panic};
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use futures::pin_mut;
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use nrf52840_hal::gpio;
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use embassy::executor::{task, Executor};
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use embassy::traits::flash::Flash;
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@ -27,43 +27,16 @@ struct AlignedBuf([u8; 4096]);
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#[task]
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async fn run() {
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let p = unwrap!(embassy_nrf::pac::Peripherals::take());
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let p = unsafe { Peripherals::steal() };
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let port0 = gpio::p0::Parts::new(p.P0);
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let pins = qspi::Pins {
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csn: port0
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.p0_17
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.into_push_pull_output(gpio::Level::High)
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.degrade(),
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sck: port0
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.p0_19
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.into_push_pull_output(gpio::Level::High)
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.degrade(),
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io0: port0
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.p0_20
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.into_push_pull_output(gpio::Level::High)
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.degrade(),
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io1: port0
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.p0_21
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.into_push_pull_output(gpio::Level::High)
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.degrade(),
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io2: Some(
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port0
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.p0_22
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.into_push_pull_output(gpio::Level::High)
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.degrade(),
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),
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io3: Some(
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port0
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.p0_23
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.into_push_pull_output(gpio::Level::High)
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.degrade(),
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),
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};
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let csn = p.p0_17;
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let sck = p.p0_19;
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let io0 = p.p0_20;
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let io1 = p.p0_21;
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let io2 = p.p0_22;
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let io3 = p.p0_23;
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let config = qspi::Config {
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pins,
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read_opcode: qspi::ReadOpcode::READ4IO,
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write_opcode: qspi::WriteOpcode::PP4IO,
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xip_offset: 0,
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@ -72,7 +45,7 @@ async fn run() {
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};
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let irq = interrupt::take!(QSPI);
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let q = qspi::Qspi::new(p.QSPI, irq, config);
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let q = qspi::Qspi::new(p.qspi, irq, sck, csn, io0, io1, io2, io3, config);
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pin_mut!(q);
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let mut id = [1; 3];
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@ -83,7 +56,7 @@ async fn run() {
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info!("id: {}", id);
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// Read status register
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let mut status = [0; 1];
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let mut status = [4; 1];
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q.as_mut()
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.custom_instruction(0x05, &[], &mut status)
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.await
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@ -1,13 +1,15 @@
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use core::future::Future;
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use core::marker::PhantomData;
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use core::pin::Pin;
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use core::task::Poll;
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use embassy::interrupt::Interrupt;
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use embassy_extras::peripheral::{PeripheralMutex, PeripheralState};
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use crate::fmt::{assert, assert_eq, *};
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use crate::hal::gpio::{Output, Pin as GpioPin, PushPull};
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use crate::gpio::Pin as GpioPin;
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use crate::interrupt::{self};
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use crate::pac::QSPI;
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use crate::{pac, peripherals};
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pub use crate::pac::qspi::ifconfig0::ADDRMODE_A as AddressMode;
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pub use crate::pac::qspi::ifconfig0::PPSIZE_A as WritePageSize;
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@ -25,25 +27,15 @@ pub use crate::pac::qspi::ifconfig0::WRITEOC_A as WriteOpcode;
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// - set gpio in high drive
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use embassy::traits::flash::{Error, Flash};
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use embassy::util::{DropBomb, WakerRegistration};
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use embassy::util::{wake_on_interrupt, DropBomb, PeripheralBorrow, WakerRegistration};
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use futures::future::poll_fn;
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pub struct Pins {
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pub sck: GpioPin<Output<PushPull>>,
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pub csn: GpioPin<Output<PushPull>>,
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pub io0: GpioPin<Output<PushPull>>,
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pub io1: GpioPin<Output<PushPull>>,
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pub io2: Option<GpioPin<Output<PushPull>>>,
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pub io3: Option<GpioPin<Output<PushPull>>>,
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}
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pub struct DeepPowerDownConfig {
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pub enter_time: u16,
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pub exit_time: u16,
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}
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pub struct Config {
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pub pins: Pins,
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pub xip_offset: u32,
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pub read_opcode: ReadOpcode,
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pub write_opcode: WriteOpcode,
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@ -51,55 +43,54 @@ pub struct Config {
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pub deep_power_down: Option<DeepPowerDownConfig>,
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}
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struct State {
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inner: QSPI,
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waker: WakerRegistration,
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pub struct Qspi<'d, T: Instance> {
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qspi: T,
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irq: T::Interrupt,
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phantom: PhantomData<&'d mut T>,
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}
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pub struct Qspi {
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inner: PeripheralMutex<State>,
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impl<'d, T: Instance> Qspi<'d, T> {
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pub fn new(
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qspi: impl PeripheralBorrow<Target = T> + 'd,
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irq: impl PeripheralBorrow<Target = T::Interrupt> + 'd,
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sck: impl PeripheralBorrow<Target = impl GpioPin> + 'd,
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csn: impl PeripheralBorrow<Target = impl GpioPin> + 'd,
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io0: impl PeripheralBorrow<Target = impl GpioPin> + 'd,
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io1: impl PeripheralBorrow<Target = impl GpioPin> + 'd,
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io2: impl PeripheralBorrow<Target = impl GpioPin> + 'd,
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io3: impl PeripheralBorrow<Target = impl GpioPin> + 'd,
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config: Config,
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) -> Self {
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let mut qspi = unsafe { qspi.unborrow() };
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let irq = unsafe { irq.unborrow() };
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let sck = unsafe { sck.unborrow() };
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let csn = unsafe { csn.unborrow() };
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let io0 = unsafe { io0.unborrow() };
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let io1 = unsafe { io1.unborrow() };
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let io2 = unsafe { io2.unborrow() };
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let io3 = unsafe { io3.unborrow() };
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let r = qspi.regs();
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for cnf in &[
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sck.conf(),
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csn.conf(),
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io0.conf(),
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io1.conf(),
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io2.conf(),
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io3.conf(),
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] {
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cnf.write(|w| w.dir().output().drive().h0h1());
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}
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impl Qspi {
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pub fn new(qspi: QSPI, irq: interrupt::QSPI, config: Config) -> Self {
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qspi.psel.sck.write(|w| {
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let pin = &config.pins.sck;
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unsafe { w.bits(pin.psel_bits()) };
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w.connect().connected()
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});
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qspi.psel.csn.write(|w| {
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let pin = &config.pins.csn;
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unsafe { w.bits(pin.psel_bits()) };
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w.connect().connected()
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});
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qspi.psel.io0.write(|w| {
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let pin = &config.pins.io0;
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unsafe { w.bits(pin.psel_bits()) };
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w.connect().connected()
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});
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qspi.psel.io1.write(|w| {
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let pin = &config.pins.io1;
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unsafe { w.bits(pin.psel_bits()) };
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w.connect().connected()
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});
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qspi.psel.io2.write(|w| {
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if let Some(ref pin) = config.pins.io2 {
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unsafe { w.bits(pin.psel_bits()) };
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w.connect().connected()
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} else {
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w.connect().disconnected()
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}
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});
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qspi.psel.io3.write(|w| {
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if let Some(ref pin) = config.pins.io3 {
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unsafe { w.bits(pin.psel_bits()) };
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w.connect().connected()
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} else {
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w.connect().disconnected()
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}
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});
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r.psel.sck.write(|w| unsafe { w.bits(sck.psel_bits()) });
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r.psel.csn.write(|w| unsafe { w.bits(csn.psel_bits()) });
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r.psel.io0.write(|w| unsafe { w.bits(io0.psel_bits()) });
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r.psel.io1.write(|w| unsafe { w.bits(io1.psel_bits()) });
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r.psel.io2.write(|w| unsafe { w.bits(io2.psel_bits()) });
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r.psel.io3.write(|w| unsafe { w.bits(io3.psel_bits()) });
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qspi.ifconfig0.write(|mut w| {
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r.ifconfig0.write(|mut w| {
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w = w.addrmode().variant(AddressMode::_24BIT);
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if config.deep_power_down.is_some() {
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w = w.dpmenable().enable();
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@ -113,14 +104,14 @@ impl Qspi {
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});
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if let Some(dpd) = &config.deep_power_down {
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qspi.dpmdur.write(|mut w| unsafe {
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r.dpmdur.write(|mut w| unsafe {
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w = w.enter().bits(dpd.enter_time);
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w = w.exit().bits(dpd.exit_time);
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w
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})
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}
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qspi.ifconfig1.write(|w| {
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r.ifconfig1.write(|w| {
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let w = unsafe { w.sckdelay().bits(80) };
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let w = w.dpmen().exit();
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let w = w.spimode().mode0();
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@ -128,48 +119,42 @@ impl Qspi {
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w
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});
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qspi.xipoffset
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r.xipoffset
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.write(|w| unsafe { w.xipoffset().bits(config.xip_offset) });
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// Enable it
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qspi.enable.write(|w| w.enable().enabled());
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r.enable.write(|w| w.enable().enabled());
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qspi.events_ready.reset();
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qspi.tasks_activate.write(|w| w.tasks_activate().bit(true));
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while qspi.events_ready.read().bits() == 0 {}
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qspi.events_ready.reset();
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r.events_ready.reset();
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r.tasks_activate.write(|w| w.tasks_activate().bit(true));
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while r.events_ready.read().bits() == 0 {}
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r.events_ready.reset();
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Self {
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inner: PeripheralMutex::new(
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State {
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inner: qspi,
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waker: WakerRegistration::new(),
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},
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qspi,
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irq,
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),
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phantom: PhantomData,
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}
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}
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pub fn sleep(self: Pin<&mut Self>) {
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self.inner().with(|s, _| {
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pub fn sleep(mut self: Pin<&mut Self>) {
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let r = unsafe { self.as_mut().get_unchecked_mut() }.qspi.regs();
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info!("flash: sleeping");
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info!("flash: state = {:?}", s.inner.status.read().bits());
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s.inner.ifconfig1.modify(|_, w| w.dpmen().enter());
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info!("flash: state = {:?}", s.inner.status.read().bits());
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info!("flash: state = {:?}", r.status.read().bits());
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r.ifconfig1.modify(|_, w| w.dpmen().enter());
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info!("flash: state = {:?}", r.status.read().bits());
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cortex_m::asm::delay(1000000);
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info!("flash: state = {:?}", s.inner.status.read().bits());
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info!("flash: state = {:?}", r.status.read().bits());
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s.inner
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.tasks_deactivate
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.write(|w| w.tasks_deactivate().set_bit());
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});
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r.tasks_deactivate.write(|w| w.tasks_deactivate().set_bit());
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}
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pub async fn custom_instruction<'a>(
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mut self: Pin<&'a mut Self>,
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pub async fn custom_instruction(
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mut self: Pin<&mut Self>,
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opcode: u8,
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req: &'a [u8],
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resp: &'a mut [u8],
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req: &[u8],
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resp: &mut [u8],
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) -> Result<(), Error> {
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let bomb = DropBomb::new();
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@ -192,14 +177,14 @@ impl Qspi {
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let len = core::cmp::max(req.len(), resp.len()) as u8;
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self.as_mut().inner().with(|s, _| {
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s.inner.cinstrdat0.write(|w| unsafe { w.bits(dat0) });
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s.inner.cinstrdat1.write(|w| unsafe { w.bits(dat1) });
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let r = unsafe { self.as_mut().get_unchecked_mut() }.qspi.regs();
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r.cinstrdat0.write(|w| unsafe { w.bits(dat0) });
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r.cinstrdat1.write(|w| unsafe { w.bits(dat1) });
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s.inner.events_ready.reset();
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s.inner.intenset.write(|w| w.ready().set());
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r.events_ready.reset();
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r.intenset.write(|w| w.ready().set());
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s.inner.cinstrconf.write(|w| {
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r.cinstrconf.write(|w| {
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let w = unsafe { w.opcode().bits(opcode) };
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let w = unsafe { w.length().bits(len + 1) };
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let w = w.lio2().bit(true);
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@ -210,13 +195,13 @@ impl Qspi {
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let w = w.lfstop().bit(false);
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w
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});
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});
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self.as_mut().wait_ready().await;
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self.as_mut().inner().with(|s, _| {
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let dat0 = s.inner.cinstrdat0.read().bits();
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let dat1 = s.inner.cinstrdat1.read().bits();
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let r = unsafe { self.as_mut().get_unchecked_mut() }.qspi.regs();
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let dat0 = r.cinstrdat0.read().bits();
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let dat1 = r.cinstrdat1.read().bits();
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for i in 0..4 {
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if i < resp.len() {
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resp[i] = (dat0 >> (i * 8)) as u8;
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@ -227,34 +212,38 @@ impl Qspi {
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resp[i] = (dat1 >> (i * 8)) as u8;
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}
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}
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});
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bomb.defuse();
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Ok(())
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}
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fn inner(self: Pin<&mut Self>) -> Pin<&mut PeripheralMutex<State>> {
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unsafe { Pin::new_unchecked(&mut self.get_unchecked_mut().inner) }
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}
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async fn wait_ready(self: Pin<&mut Self>) {
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let this = unsafe { self.get_unchecked_mut() };
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fn wait_ready<'a>(mut self: Pin<&'a mut Self>) -> impl Future<Output = ()> + 'a {
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poll_fn(move |cx| {
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self.as_mut().inner().with(|s, _irq| {
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if s.inner.events_ready.read().bits() != 0 {
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let r = this.qspi.regs();
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if r.events_ready.read().bits() != 0 {
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r.events_ready.reset();
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return Poll::Ready(());
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}
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s.waker.register(cx.waker());
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wake_on_interrupt(&mut this.irq, cx.waker());
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Poll::Pending
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})
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})
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.await
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}
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}
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impl Flash for Qspi {
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type ReadFuture<'a> = impl Future<Output = Result<(), Error>> + 'a;
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type WriteFuture<'a> = impl Future<Output = Result<(), Error>> + 'a;
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type ErasePageFuture<'a> = impl Future<Output = Result<(), Error>> + 'a;
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impl<'d, T: Instance> Flash for Qspi<'d, T> {
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#[rustfmt::skip]
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type ReadFuture<'a> where Self: 'a = impl Future<Output = Result<(), Error>> + 'a;
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#[rustfmt::skip]
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type WriteFuture<'a> where Self: 'a = impl Future<Output = Result<(), Error>> + 'a;
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#[rustfmt::skip]
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type ErasePageFuture<'a> where Self: 'a = impl Future<Output = Result<(), Error>> + 'a;
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fn read<'a>(
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mut self: Pin<&'a mut Self>,
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@ -268,26 +257,21 @@ impl Flash for Qspi {
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assert_eq!(data.len() as u32 % 4, 0);
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assert_eq!(address as u32 % 4, 0);
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self.as_mut().inner().with(|s, _| {
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s.inner
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.read
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let r = unsafe { self.as_mut().get_unchecked_mut() }.qspi.regs();
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r.read
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.src
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.write(|w| unsafe { w.src().bits(address as u32) });
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s.inner
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.read
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r.read
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.dst
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.write(|w| unsafe { w.dst().bits(data.as_ptr() as u32) });
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s.inner
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.read
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r.read
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.cnt
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.write(|w| unsafe { w.cnt().bits(data.len() as u32) });
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s.inner.events_ready.reset();
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s.inner.intenset.write(|w| w.ready().set());
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s.inner
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.tasks_readstart
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.write(|w| w.tasks_readstart().bit(true));
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});
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r.events_ready.reset();
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r.intenset.write(|w| w.ready().set());
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r.tasks_readstart.write(|w| w.tasks_readstart().bit(true));
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self.as_mut().wait_ready().await;
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@ -309,26 +293,20 @@ impl Flash for Qspi {
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assert_eq!(data.len() as u32 % 4, 0);
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assert_eq!(address as u32 % 4, 0);
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self.as_mut().inner().with(|s, _| {
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s.inner
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.write
|
||||
let r = unsafe { self.as_mut().get_unchecked_mut() }.qspi.regs();
|
||||
r.write
|
||||
.src
|
||||
.write(|w| unsafe { w.src().bits(data.as_ptr() as u32) });
|
||||
s.inner
|
||||
.write
|
||||
r.write
|
||||
.dst
|
||||
.write(|w| unsafe { w.dst().bits(address as u32) });
|
||||
s.inner
|
||||
.write
|
||||
r.write
|
||||
.cnt
|
||||
.write(|w| unsafe { w.cnt().bits(data.len() as u32) });
|
||||
|
||||
s.inner.events_ready.reset();
|
||||
s.inner.intenset.write(|w| w.ready().set());
|
||||
s.inner
|
||||
.tasks_writestart
|
||||
.write(|w| w.tasks_writestart().bit(true));
|
||||
});
|
||||
r.events_ready.reset();
|
||||
r.intenset.write(|w| w.ready().set());
|
||||
r.tasks_writestart.write(|w| w.tasks_writestart().bit(true));
|
||||
|
||||
self.as_mut().wait_ready().await;
|
||||
|
||||
@ -344,19 +322,15 @@ impl Flash for Qspi {
|
||||
|
||||
assert_eq!(address as u32 % 4096, 0);
|
||||
|
||||
self.as_mut().inner().with(|s, _| {
|
||||
s.inner
|
||||
.erase
|
||||
let r = unsafe { self.as_mut().get_unchecked_mut() }.qspi.regs();
|
||||
r.erase
|
||||
.ptr
|
||||
.write(|w| unsafe { w.ptr().bits(address as u32) });
|
||||
s.inner.erase.len.write(|w| w.len()._4kb());
|
||||
r.erase.len.write(|w| w.len()._4kb());
|
||||
|
||||
s.inner.events_ready.reset();
|
||||
s.inner.intenset.write(|w| w.ready().set());
|
||||
s.inner
|
||||
.tasks_erasestart
|
||||
.write(|w| w.tasks_erasestart().bit(true));
|
||||
});
|
||||
r.events_ready.reset();
|
||||
r.intenset.write(|w| w.ready().set());
|
||||
r.tasks_erasestart.write(|w| w.tasks_erasestart().bit(true));
|
||||
|
||||
self.as_mut().wait_ready().await;
|
||||
|
||||
@ -383,13 +357,29 @@ impl Flash for Qspi {
|
||||
}
|
||||
}
|
||||
|
||||
impl PeripheralState for State {
|
||||
type Interrupt = interrupt::QSPI;
|
||||
mod sealed {
|
||||
use super::*;
|
||||
|
||||
fn on_interrupt(&mut self) {
|
||||
if self.inner.events_ready.read().bits() != 0 {
|
||||
self.inner.intenclr.write(|w| w.ready().clear());
|
||||
self.waker.wake()
|
||||
pub trait Instance {
|
||||
fn regs(&mut self) -> &pac::qspi::RegisterBlock;
|
||||
}
|
||||
}
|
||||
|
||||
pub trait Instance: sealed::Instance + 'static {
|
||||
type Interrupt: Interrupt;
|
||||
}
|
||||
|
||||
macro_rules! make_impl {
|
||||
($type:ident, $irq:ident) => {
|
||||
impl sealed::Instance for peripherals::$type {
|
||||
fn regs(&mut self) -> &pac::qspi::RegisterBlock {
|
||||
unsafe { &*pac::$type::ptr() }
|
||||
}
|
||||
}
|
||||
impl Instance for peripherals::$type {
|
||||
type Interrupt = interrupt::$irq;
|
||||
}
|
||||
};
|
||||
}
|
||||
|
||||
make_impl!(QSPI, QSPI);
|
||||
|
||||
@ -11,9 +11,17 @@ pub enum Error {
|
||||
}
|
||||
|
||||
pub trait Flash {
|
||||
type ReadFuture<'a>: Future<Output = Result<(), Error>>;
|
||||
type WriteFuture<'a>: Future<Output = Result<(), Error>>;
|
||||
type ErasePageFuture<'a>: Future<Output = Result<(), Error>>;
|
||||
type ReadFuture<'a>: Future<Output = Result<(), Error>>
|
||||
where
|
||||
Self: 'a;
|
||||
|
||||
type WriteFuture<'a>: Future<Output = Result<(), Error>>
|
||||
where
|
||||
Self: 'a;
|
||||
|
||||
type ErasePageFuture<'a>: Future<Output = Result<(), Error>>
|
||||
where
|
||||
Self: 'a;
|
||||
|
||||
/// Reads data from the flash device.
|
||||
///
|
||||
|
||||
Loading…
Reference in New Issue
Block a user