Mix dmamux into bdma_v1.
This commit is contained in:
@ -6,25 +6,3 @@ mod _version;
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#[allow(unused)]
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pub use _version::*;
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use core::future::Future;
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pub trait WriteDma<T> {
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type WriteDmaFuture<'a>: Future<Output = ()> + 'a
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where
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Self: 'a;
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fn transfer<'a>(&'a mut self, buf: &'a [u8], dst: *mut u8) -> Self::WriteDmaFuture<'a>
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where
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T: 'a;
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}
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pub trait ReadDma<T> {
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type ReadDmaFuture<'a>: Future<Output = ()> + 'a
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where
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Self: 'a;
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fn transfer<'a>(&'a mut self, src: *const u8, buf: &'a mut [u8]) -> Self::ReadDmaFuture<'a>
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where
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T: 'a;
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}
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@ -6,10 +6,11 @@ use embassy::interrupt::{Interrupt, InterruptExt};
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use embassy::util::{AtomicWaker, OnDrop};
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use futures::future::poll_fn;
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use super::{ReadDma, WriteDma};
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use crate::dma_traits::{ReadDma, WriteDma};
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use crate::interrupt;
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use crate::pac;
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use crate::pac::bdma::vals;
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use crate::rcc::sealed::RccPeripheral;
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const CH_COUNT: usize = pac::peripheral_count!(DMA) * 8;
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const CH_STATUS_NONE: u8 = 0;
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@ -57,6 +58,9 @@ pub(crate) async unsafe fn transfer_p2m(
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while regs.cr().read().en() {}
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});
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#[cfg(dmamux)]
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crate::dmamux::configure_channel(1, 2);
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regs.par().write_value(src as u32);
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regs.mar().write_value(dst.as_mut_ptr() as u32);
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regs.ndtr().write(|w| w.set_ndt(dst.len() as u16));
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@ -88,6 +92,9 @@ pub(crate) async unsafe fn transfer_m2p(
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state_number: usize,
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src: &[u8],
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dst: *mut u8,
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#[cfg(dmamux)] dmamux_regs: &'static pac::dmamux::Dmamux,
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#[cfg(dmamux)] dmamux_ch_num: u8,
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#[cfg(dmamux)] request: u8,
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) {
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// ndtr is max 16 bits.
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assert!(src.len() <= 0xFFFF);
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@ -105,6 +112,9 @@ pub(crate) async unsafe fn transfer_m2p(
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while regs.cr().read().en() {}
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});
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#[cfg(dmamux)]
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crate::dmamux::configure_dmamux(dmamux_regs, dmamux_ch_num, request);
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regs.par().write_value(dst as u32);
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regs.mar().write_value(src.as_ptr() as u32);
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regs.ndtr().write(|w| w.set_ndt(src.len() as u16));
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@ -161,9 +171,10 @@ pub(crate) unsafe fn init() {
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}
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pac::peripherals! {
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(bdma, DMA1) => {
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critical_section::with(|_| {
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pac::RCC.ahbenr().modify(|w| w.set_dmaen(true));
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});
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//critical_section::with(|_| {
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//pac::RCC.ahbenr().modify(|w| w.set_dmaen(true));
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//});
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crate::peripherals::DMA1::enable();
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};
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}
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}
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@ -220,8 +231,10 @@ macro_rules! impl_dma_channel {
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}
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}
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#[cfg(not(dmamux))]
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impl<T> WriteDma<T> for crate::peripherals::$channel_peri
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where
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Self: crate::dmamux::sealed::PeripheralChannel<T, crate::dmamux::M2P>,
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T: 'static,
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{
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type WriteDmaFuture<'a> = impl Future<Output = ()>;
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@ -234,10 +247,47 @@ macro_rules! impl_dma_channel {
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let state_num = self.state_num();
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let regs = self.regs();
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unsafe { transfer_m2p(regs, state_num, buf, dst) }
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}
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}
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#[cfg(dmamux)]
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impl<T> WriteDma<T> for crate::peripherals::$channel_peri
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where
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Self: crate::dmamux::sealed::PeripheralChannel<T, crate::dmamux::M2P>,
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T: 'static,
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{
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type WriteDmaFuture<'a> = impl Future<Output = ()>;
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fn transfer<'a>(&'a mut self, buf: &'a [u8], dst: *mut u8) -> Self::WriteDmaFuture<'a>
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where
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T: 'a,
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{
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use sealed::Channel as _Channel;
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let state_num = self.state_num();
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let regs = self.regs();
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use crate::dmamux::sealed::Channel as _MuxChannel;
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use crate::dmamux::sealed::PeripheralChannel;
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let dmamux_regs = self.dmamux_regs();
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let dmamux_ch_num = self.dma_ch_num();
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let request = PeripheralChannel::<T, crate::dmamux::M2P>::request(self);
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unsafe {
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transfer_m2p(
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regs,
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state_num,
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buf,
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dst,
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dmamux_regs,
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dmamux_ch_num,
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request,
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)
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}
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}
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}
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impl<T> ReadDma<T> for crate::peripherals::$channel_peri
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where
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T: 'static,
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@ -292,6 +342,8 @@ pac::interrupts! {
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#[cfg(usart)]
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use crate::usart;
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#[cfg(not(dmamux))]
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pac::peripheral_dma_channels! {
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($peri:ident, usart, $kind:ident, RX, $channel_peri:ident, $dma_peri:ident, $channel_num:expr) => {
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impl usart::RxDma<crate::peripherals::$peri> for crate::peripherals::$channel_peri { }
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@ -302,4 +354,34 @@ pac::peripheral_dma_channels! {
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impl usart::TxDma<crate::peripherals::$peri> for crate::peripherals::$channel_peri { }
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impl usart::sealed::TxDma<crate::peripherals::$peri> for crate::peripherals::$channel_peri { }
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};
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($peri:ident, uart, $kind:ident, RX, $channel_peri:ident, $dma_peri:ident, $channel_num:expr) => {
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impl usart::RxDma<crate::peripherals::$peri> for crate::peripherals::$channel_peri { }
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impl usart::sealed::RxDma<crate::peripherals::$peri> for crate::peripherals::$channel_peri { }
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};
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($peri:ident, uart, $kind:ident, TX, $channel_peri:ident, $dma_peri:ident, $channel_num:expr) => {
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impl usart::TxDma<crate::peripherals::$peri> for crate::peripherals::$channel_peri { }
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impl usart::sealed::TxDma<crate::peripherals::$peri> for crate::peripherals::$channel_peri { }
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};
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}
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#[cfg(dmamux)]
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pac::peripherals! {
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(usart, $peri:ident) => {
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pac::dma_channels! {
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($channel_peri:ident, $dma_peri:ident, $channel_num:expr) => {
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impl usart::TxDma<crate::peripherals::$peri> for crate::peripherals::$channel_peri { }
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impl usart::sealed::TxDma<crate::peripherals::$peri> for crate::peripherals::$channel_peri { }
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};
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}
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};
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(uart, $peri:ident) => {
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pac::dma_channels! {
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($channel_peri:ident, $dma_peri:ident, $channel_num:expr) => {
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impl usart::TxDma<crate::peripherals::$peri> for crate::peripherals::$channel_peri { }
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impl usart::sealed::TxDma<crate::peripherals::$peri> for crate::peripherals::$channel_peri { }
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};
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}
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};
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}
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