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Remove PeripheralRef::into_inner()

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This commit is contained in:
Dario Nieuwenhuis 2022-07-23 14:27:45 +02:00
parent a158295782
commit f02ba35482
11 changed files with 156 additions and 105 deletions
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4
embassy-hal-common/src/peripheral.rs
View File

@ -43,10 +43,6 @@ impl<'a, T> PeripheralRef<'a, T> {
_lifetime: PhantomData, _lifetime: PhantomData,
} }
} }
pub unsafe fn into_inner(self) -> T {
self.inner
}
} }
impl<'a, T> Deref for PeripheralRef<'a, T> { impl<'a, T> Deref for PeripheralRef<'a, T> {

9
embassy-nrf/src/buffered_uarte.rs
View File

@ -147,8 +147,7 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> {
timer.cc(0).short_compare_stop(); timer.cc(0).short_compare_stop();
let mut ppi_ch1 = Ppi::new_one_to_two( let mut ppi_ch1 = Ppi::new_one_to_two(
//TODO: Avoid into_inner? ppi_ch1.map_into(),
unsafe { ppi_ch1.into_inner() }.degrade(),
Event::from_reg(&r.events_rxdrdy), Event::from_reg(&r.events_rxdrdy),
timer.task_clear(), timer.task_clear(),
timer.task_start(), timer.task_start(),
@ -156,16 +155,14 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> {
ppi_ch1.enable(); ppi_ch1.enable();
let mut ppi_ch2 = Ppi::new_one_to_one( let mut ppi_ch2 = Ppi::new_one_to_one(
//TODO: Avoid into_inner? ppi_ch2.map_into(),
unsafe { ppi_ch2.into_inner() }.degrade(),
timer.cc(0).event_compare(), timer.cc(0).event_compare(),
Task::from_reg(&r.tasks_stoprx), Task::from_reg(&r.tasks_stoprx),
); );
ppi_ch2.enable(); ppi_ch2.enable();
Self { Self {
//TODO: Avoid into_inner? inner: PeripheralMutex::new(irq, &mut state.0, move || StateInner {
inner: PeripheralMutex::new(unsafe { irq.into_inner() }, &mut state.0, move || StateInner {
phantom: PhantomData, phantom: PhantomData,
timer, timer,
_ppi_ch1: ppi_ch1, _ppi_ch1: ppi_ch1,

22
embassy-nrf/src/gpio.rs
View File

@ -374,7 +374,7 @@ pub(crate) mod sealed {
} }
} }
pub trait Pin: Peripheral<P = Self> + sealed::Pin + Sized + 'static { pub trait Pin: Peripheral<P = Self> + Into<AnyPin> + sealed::Pin + Sized + 'static {
/// Number of the pin within the port (0..31) /// Number of the pin within the port (0..31)
#[inline] #[inline]
fn pin(&self) -> u8 { fn pin(&self) -> u8 {
@ -416,20 +416,6 @@ impl AnyPin {
pub unsafe fn steal(pin_port: u8) -> Self { pub unsafe fn steal(pin_port: u8) -> Self {
Self { pin_port } Self { pin_port }
} }
pub(crate) fn into_degraded_ref<'a>(pin: impl Peripheral<P = impl Pin + 'a> + 'a) -> PeripheralRef<'a, Self> {
PeripheralRef::new(AnyPin {
pin_port: pin.into_ref().pin_port(),
})
}
}
macro_rules! into_degraded_ref {
($($name:ident),*) => {
$(
let $name = $crate::gpio::AnyPin::into_degraded_ref($name);
)*
};
} }
impl_peripheral!(AnyPin); impl_peripheral!(AnyPin);
@ -475,6 +461,12 @@ macro_rules! impl_pin {
$port_num * 32 + $pin_num $port_num * 32 + $pin_num
} }
} }
impl From<peripherals::$type> for crate::gpio::AnyPin {
fn from(val: peripherals::$type) -> Self {
crate::gpio::Pin::degrade(val)
}
}
}; };
} }

16
embassy-nrf/src/ppi/mod.rs
View File

@ -92,11 +92,11 @@ pub trait Channel: sealed::Channel + Peripheral<P = Self> + Sized {
fn number(&self) -> usize; fn number(&self) -> usize;
} }
pub trait ConfigurableChannel: Channel { pub trait ConfigurableChannel: Channel + Into<AnyConfigurableChannel> {
fn degrade(self) -> AnyConfigurableChannel; fn degrade(self) -> AnyConfigurableChannel;
} }
pub trait StaticChannel: Channel { pub trait StaticChannel: Channel + Into<AnyStaticChannel> {
fn degrade(self) -> AnyStaticChannel; fn degrade(self) -> AnyStaticChannel;
} }
@ -167,6 +167,12 @@ macro_rules! impl_ppi_channel {
} }
} }
} }
impl From<peripherals::$type> for crate::ppi::AnyStaticChannel {
fn from(val: peripherals::$type) -> Self {
crate::ppi::StaticChannel::degrade(val)
}
}
}; };
($type:ident, $number:expr => configurable) => { ($type:ident, $number:expr => configurable) => {
impl_ppi_channel!($type, $number); impl_ppi_channel!($type, $number);
@ -178,6 +184,12 @@ macro_rules! impl_ppi_channel {
} }
} }
} }
impl From<peripherals::$type> for crate::ppi::AnyConfigurableChannel {
fn from(val: peripherals::$type) -> Self {
crate::ppi::ConfigurableChannel::degrade(val)
}
}
}; };
} }

60
embassy-nrf/src/pwm.rs
View File

@ -3,7 +3,7 @@
use core::marker::PhantomData; use core::marker::PhantomData;
use core::sync::atomic::{compiler_fence, Ordering}; use core::sync::atomic::{compiler_fence, Ordering};
use embassy_hal_common::PeripheralRef; use embassy_hal_common::{into_ref, PeripheralRef};
use crate::gpio::sealed::Pin as _; use crate::gpio::sealed::Pin as _;
use crate::gpio::{AnyPin, Pin as GpioPin, PselBits}; use crate::gpio::{AnyPin, Pin as GpioPin, PselBits};
@ -55,8 +55,8 @@ impl<'d, T: Instance> SequencePwm<'d, T> {
ch0: impl Peripheral<P = impl GpioPin> + 'd, ch0: impl Peripheral<P = impl GpioPin> + 'd,
config: Config, config: Config,
) -> Result<Self, Error> { ) -> Result<Self, Error> {
into_degraded_ref!(ch0); into_ref!(ch0);
Self::new_inner(pwm, Some(ch0), None, None, None, config) Self::new_inner(pwm, Some(ch0.map_into()), None, None, None, config)
} }
/// Create a new 2-channel PWM /// Create a new 2-channel PWM
@ -67,8 +67,8 @@ impl<'d, T: Instance> SequencePwm<'d, T> {
ch1: impl Peripheral<P = impl GpioPin> + 'd, ch1: impl Peripheral<P = impl GpioPin> + 'd,
config: Config, config: Config,
) -> Result<Self, Error> { ) -> Result<Self, Error> {
into_degraded_ref!(ch0, ch1); into_ref!(ch0, ch1);
Self::new_inner(pwm, Some(ch0), Some(ch1), None, None, config) Self::new_inner(pwm, Some(ch0.map_into()), Some(ch1.map_into()), None, None, config)
} }
/// Create a new 3-channel PWM /// Create a new 3-channel PWM
@ -80,8 +80,15 @@ impl<'d, T: Instance> SequencePwm<'d, T> {
ch2: impl Peripheral<P = impl GpioPin> + 'd, ch2: impl Peripheral<P = impl GpioPin> + 'd,
config: Config, config: Config,
) -> Result<Self, Error> { ) -> Result<Self, Error> {
into_degraded_ref!(ch0, ch1, ch2); into_ref!(ch0, ch1, ch2);
Self::new_inner(pwm, Some(ch0), Some(ch1), Some(ch2), None, config) Self::new_inner(
pwm,
Some(ch0.map_into()),
Some(ch1.map_into()),
Some(ch2.map_into()),
None,
config,
)
} }
/// Create a new 4-channel PWM /// Create a new 4-channel PWM
@ -94,8 +101,15 @@ impl<'d, T: Instance> SequencePwm<'d, T> {
ch3: impl Peripheral<P = impl GpioPin> + 'd, ch3: impl Peripheral<P = impl GpioPin> + 'd,
config: Config, config: Config,
) -> Result<Self, Error> { ) -> Result<Self, Error> {
into_degraded_ref!(ch0, ch1, ch2, ch3); into_ref!(ch0, ch1, ch2, ch3);
Self::new_inner(pwm, Some(ch0), Some(ch1), Some(ch2), Some(ch3), config) Self::new_inner(
pwm,
Some(ch0.map_into()),
Some(ch1.map_into()),
Some(ch2.map_into()),
Some(ch3.map_into()),
config,
)
} }
fn new_inner( fn new_inner(
@ -561,8 +575,8 @@ impl<'d, T: Instance> SimplePwm<'d, T> {
#[allow(unused_unsafe)] #[allow(unused_unsafe)]
pub fn new_1ch(pwm: impl Peripheral<P = T> + 'd, ch0: impl Peripheral<P = impl GpioPin> + 'd) -> Self { pub fn new_1ch(pwm: impl Peripheral<P = T> + 'd, ch0: impl Peripheral<P = impl GpioPin> + 'd) -> Self {
unsafe { unsafe {
into_degraded_ref!(ch0); into_ref!(ch0);
Self::new_inner(pwm, Some(ch0), None, None, None) Self::new_inner(pwm, Some(ch0.map_into()), None, None, None)
} }
} }
@ -573,8 +587,8 @@ impl<'d, T: Instance> SimplePwm<'d, T> {
ch0: impl Peripheral<P = impl GpioPin> + 'd, ch0: impl Peripheral<P = impl GpioPin> + 'd,
ch1: impl Peripheral<P = impl GpioPin> + 'd, ch1: impl Peripheral<P = impl GpioPin> + 'd,
) -> Self { ) -> Self {
into_degraded_ref!(ch0, ch1); into_ref!(ch0, ch1);
Self::new_inner(pwm, Some(ch0), Some(ch1), None, None) Self::new_inner(pwm, Some(ch0.map_into()), Some(ch1.map_into()), None, None)
} }
/// Create a new 3-channel PWM /// Create a new 3-channel PWM
@ -586,8 +600,14 @@ impl<'d, T: Instance> SimplePwm<'d, T> {
ch2: impl Peripheral<P = impl GpioPin> + 'd, ch2: impl Peripheral<P = impl GpioPin> + 'd,
) -> Self { ) -> Self {
unsafe { unsafe {
into_degraded_ref!(ch0, ch1, ch2); into_ref!(ch0, ch1, ch2);
Self::new_inner(pwm, Some(ch0), Some(ch1), Some(ch2), None) Self::new_inner(
pwm,
Some(ch0.map_into()),
Some(ch1.map_into()),
Some(ch2.map_into()),
None,
)
} }
} }
@ -601,8 +621,14 @@ impl<'d, T: Instance> SimplePwm<'d, T> {
ch3: impl Peripheral<P = impl GpioPin> + 'd, ch3: impl Peripheral<P = impl GpioPin> + 'd,
) -> Self { ) -> Self {
unsafe { unsafe {
into_degraded_ref!(ch0, ch1, ch2, ch3); into_ref!(ch0, ch1, ch2, ch3);
Self::new_inner(pwm, Some(ch0), Some(ch1), Some(ch2), Some(ch3)) Self::new_inner(
pwm,
Some(ch0.map_into()),
Some(ch1.map_into()),
Some(ch2.map_into()),
Some(ch3.map_into()),
)
} }
} }

8
embassy-nrf/src/qdec.rs
View File

@ -49,8 +49,8 @@ impl<'d> Qdec<'d> {
b: impl Peripheral<P = impl GpioPin> + 'd, b: impl Peripheral<P = impl GpioPin> + 'd,
config: Config, config: Config,
) -> Self { ) -> Self {
into_degraded_ref!(a, b); into_ref!(a, b);
Self::new_inner(qdec, irq, a, b, None, config) Self::new_inner(qdec, irq, a.map_into(), b.map_into(), None, config)
} }
pub fn new_with_led( pub fn new_with_led(
@ -61,8 +61,8 @@ impl<'d> Qdec<'d> {
led: impl Peripheral<P = impl GpioPin> + 'd, led: impl Peripheral<P = impl GpioPin> + 'd,
config: Config, config: Config,
) -> Self { ) -> Self {
into_degraded_ref!(a, b, led); into_ref!(a, b, led);
Self::new_inner(qdec, irq, a, b, Some(led), config) Self::new_inner(qdec, irq, a.map_into(), b.map_into(), Some(led.map_into()), config)
} }
fn new_inner( fn new_inner(

19
embassy-nrf/src/qspi.rs
View File

@ -7,7 +7,6 @@ use embassy_hal_common::drop::DropBomb;
use embassy_hal_common::{into_ref, PeripheralRef}; use embassy_hal_common::{into_ref, PeripheralRef};
use futures::future::poll_fn; use futures::future::poll_fn;
use crate::gpio::sealed::Pin as _;
use crate::gpio::{self, Pin as GpioPin}; use crate::gpio::{self, Pin as GpioPin};
use crate::interrupt::{Interrupt, InterruptExt}; use crate::interrupt::{Interrupt, InterruptExt};
pub use crate::pac::qspi::ifconfig0::{ pub use crate::pac::qspi::ifconfig0::{
@ -82,12 +81,18 @@ impl<'d, T: Instance, const FLASH_SIZE: usize> Qspi<'d, T, FLASH_SIZE> {
let r = T::regs(); let r = T::regs();
into_degraded_ref!(sck, csn, io0, io1, io2, io3); sck.set_high();
csn.set_high();
for pin in [&sck, &csn, &io0, &io1, &io2, &io3] { io0.set_high();
pin.set_high(); io1.set_high();
pin.conf().write(|w| w.dir().output().drive().h0h1()); io2.set_high();
} io3.set_high();
sck.conf().write(|w| w.dir().output().drive().h0h1());
csn.conf().write(|w| w.dir().output().drive().h0h1());
io0.conf().write(|w| w.dir().output().drive().h0h1());
io1.conf().write(|w| w.dir().output().drive().h0h1());
io2.conf().write(|w| w.dir().output().drive().h0h1());
io3.conf().write(|w| w.dir().output().drive().h0h1());
r.psel.sck.write(|w| unsafe { w.bits(sck.psel_bits()) }); r.psel.sck.write(|w| unsafe { w.bits(sck.psel_bits()) });
r.psel.csn.write(|w| unsafe { w.bits(csn.psel_bits()) }); r.psel.csn.write(|w| unsafe { w.bits(csn.psel_bits()) });

19
embassy-nrf/src/spim.rs
View File

@ -60,8 +60,15 @@ impl<'d, T: Instance> Spim<'d, T> {
mosi: impl Peripheral<P = impl GpioPin> + 'd, mosi: impl Peripheral<P = impl GpioPin> + 'd,
config: Config, config: Config,
) -> Self { ) -> Self {
into_degraded_ref!(sck, miso, mosi); into_ref!(sck, miso, mosi);
Self::new_inner(spim, irq, sck, Some(miso), Some(mosi), config) Self::new_inner(
spim,
irq,
sck.map_into(),
Some(miso.map_into()),
Some(mosi.map_into()),
config,
)
} }
pub fn new_txonly( pub fn new_txonly(
@ -71,8 +78,8 @@ impl<'d, T: Instance> Spim<'d, T> {
mosi: impl Peripheral<P = impl GpioPin> + 'd, mosi: impl Peripheral<P = impl GpioPin> + 'd,
config: Config, config: Config,
) -> Self { ) -> Self {
into_degraded_ref!(sck, mosi); into_ref!(sck, mosi);
Self::new_inner(spim, irq, sck, None, Some(mosi), config) Self::new_inner(spim, irq, sck.map_into(), None, Some(mosi.map_into()), config)
} }
pub fn new_rxonly( pub fn new_rxonly(
@ -82,8 +89,8 @@ impl<'d, T: Instance> Spim<'d, T> {
miso: impl Peripheral<P = impl GpioPin> + 'd, miso: impl Peripheral<P = impl GpioPin> + 'd,
config: Config, config: Config,
) -> Self { ) -> Self {
into_degraded_ref!(sck, miso); into_ref!(sck, miso);
Self::new_inner(spim, irq, sck, Some(miso), None, config) Self::new_inner(spim, irq, sck.map_into(), Some(miso.map_into()), None, config)
} }
fn new_inner( fn new_inner(

61
embassy-nrf/src/uarte.rs
View File

@ -89,8 +89,8 @@ impl<'d, T: Instance> Uarte<'d, T> {
txd: impl Peripheral<P = impl GpioPin> + 'd, txd: impl Peripheral<P = impl GpioPin> + 'd,
config: Config, config: Config,
) -> Self { ) -> Self {
into_degraded_ref!(rxd, txd); into_ref!(rxd, txd);
Self::new_inner(uarte, irq, rxd, txd, None, None, config) Self::new_inner(uarte, irq, rxd.map_into(), txd.map_into(), None, None, config)
} }
/// Create a new UARTE with hardware flow control (RTS/CTS) /// Create a new UARTE with hardware flow control (RTS/CTS)
@ -103,8 +103,16 @@ impl<'d, T: Instance> Uarte<'d, T> {
rts: impl Peripheral<P = impl GpioPin> + 'd, rts: impl Peripheral<P = impl GpioPin> + 'd,
config: Config, config: Config,
) -> Self { ) -> Self {
into_degraded_ref!(rxd, txd, cts, rts); into_ref!(rxd, txd, cts, rts);
Self::new_inner(uarte, irq, rxd, txd, Some(cts), Some(rts), config) Self::new_inner(
uarte,
irq,
rxd.map_into(),
txd.map_into(),
Some(cts.map_into()),
Some(rts.map_into()),
config,
)
} }
fn new_inner( fn new_inner(
@ -242,8 +250,8 @@ impl<'d, T: Instance> UarteTx<'d, T> {
txd: impl Peripheral<P = impl GpioPin> + 'd, txd: impl Peripheral<P = impl GpioPin> + 'd,
config: Config, config: Config,
) -> Self { ) -> Self {
into_degraded_ref!(txd); into_ref!(txd);
Self::new_inner(uarte, irq, txd, None, config) Self::new_inner(uarte, irq, txd.map_into(), None, config)
} }
/// Create a new tx-only UARTE with hardware flow control (RTS/CTS) /// Create a new tx-only UARTE with hardware flow control (RTS/CTS)
@ -254,8 +262,8 @@ impl<'d, T: Instance> UarteTx<'d, T> {
cts: impl Peripheral<P = impl GpioPin> + 'd, cts: impl Peripheral<P = impl GpioPin> + 'd,
config: Config, config: Config,
) -> Self { ) -> Self {
into_degraded_ref!(txd, cts); into_ref!(txd, cts);
Self::new_inner(uarte, irq, txd, Some(cts), config) Self::new_inner(uarte, irq, txd.map_into(), Some(cts.map_into()), config)
} }
fn new_inner( fn new_inner(
@ -434,8 +442,8 @@ impl<'d, T: Instance> UarteRx<'d, T> {
rxd: impl Peripheral<P = impl GpioPin> + 'd, rxd: impl Peripheral<P = impl GpioPin> + 'd,
config: Config, config: Config,
) -> Self { ) -> Self {
into_degraded_ref!(rxd); into_ref!(rxd);
Self::new_inner(uarte, irq, rxd, None, config) Self::new_inner(uarte, irq, rxd.map_into(), None, config)
} }
/// Create a new rx-only UARTE with hardware flow control (RTS/CTS) /// Create a new rx-only UARTE with hardware flow control (RTS/CTS)
@ -446,8 +454,8 @@ impl<'d, T: Instance> UarteRx<'d, T> {
rts: impl Peripheral<P = impl GpioPin> + 'd, rts: impl Peripheral<P = impl GpioPin> + 'd,
config: Config, config: Config,
) -> Self { ) -> Self {
into_degraded_ref!(rxd, rts); into_ref!(rxd, rts);
Self::new_inner(uarte, irq, rxd, Some(rts), config) Self::new_inner(uarte, irq, rxd.map_into(), Some(rts.map_into()), config)
} }
fn new_inner( fn new_inner(
@ -677,8 +685,19 @@ impl<'d, U: Instance, T: TimerInstance> UarteWithIdle<'d, U, T> {
txd: impl Peripheral<P = impl GpioPin> + 'd, txd: impl Peripheral<P = impl GpioPin> + 'd,
config: Config, config: Config,
) -> Self { ) -> Self {
into_degraded_ref!(rxd, txd); into_ref!(rxd, txd);
Self::new_inner(uarte, timer, ppi_ch1, ppi_ch2, irq, rxd, txd, None, None, config) Self::new_inner(
uarte,
timer,
ppi_ch1,
ppi_ch2,
irq,
rxd.map_into(),
txd.map_into(),
None,
None,
config,
)
} }
/// Create a new UARTE with hardware flow control (RTS/CTS) /// Create a new UARTE with hardware flow control (RTS/CTS)
@ -694,17 +713,17 @@ impl<'d, U: Instance, T: TimerInstance> UarteWithIdle<'d, U, T> {
rts: impl Peripheral<P = impl GpioPin> + 'd, rts: impl Peripheral<P = impl GpioPin> + 'd,
config: Config, config: Config,
) -> Self { ) -> Self {
into_degraded_ref!(rxd, txd, cts, rts); into_ref!(rxd, txd, cts, rts);
Self::new_inner( Self::new_inner(
uarte, uarte,
timer, timer,
ppi_ch1, ppi_ch1,
ppi_ch2, ppi_ch2,
irq, irq,
rxd, rxd.map_into(),
txd, txd.map_into(),
Some(cts), Some(cts.map_into()),
Some(rts), Some(rts.map_into()),
config, config,
) )
} }
@ -744,7 +763,7 @@ impl<'d, U: Instance, T: TimerInstance> UarteWithIdle<'d, U, T> {
timer.cc(0).short_compare_stop(); timer.cc(0).short_compare_stop();
let mut ppi_ch1 = Ppi::new_one_to_two( let mut ppi_ch1 = Ppi::new_one_to_two(
unsafe { ppi_ch1.into_inner() }.degrade(), ppi_ch1.map_into(),
Event::from_reg(&r.events_rxdrdy), Event::from_reg(&r.events_rxdrdy),
timer.task_clear(), timer.task_clear(),
timer.task_start(), timer.task_start(),
@ -752,7 +771,7 @@ impl<'d, U: Instance, T: TimerInstance> UarteWithIdle<'d, U, T> {
ppi_ch1.enable(); ppi_ch1.enable();
let mut ppi_ch2 = Ppi::new_one_to_one( let mut ppi_ch2 = Ppi::new_one_to_one(
unsafe { ppi_ch2.into_inner() }.degrade(), ppi_ch2.map_into(),
timer.cc(0).event_compare(), timer.cc(0).event_compare(),
Task::from_reg(&r.tasks_stoprx), Task::from_reg(&r.tasks_stoprx),
); );

24
embassy-rp/src/gpio.rs
View File

@ -647,7 +647,7 @@ pub(crate) mod sealed {
} }
} }
pub trait Pin: Peripheral<P = Self> + sealed::Pin { pub trait Pin: Peripheral<P = Self> + Into<AnyPin> + sealed::Pin + Sized + 'static {
/// Degrade to a generic pin struct /// Degrade to a generic pin struct
fn degrade(self) -> AnyPin { fn degrade(self) -> AnyPin {
AnyPin { AnyPin {
@ -660,22 +660,6 @@ pub struct AnyPin {
pin_bank: u8, pin_bank: u8,
} }
impl AnyPin {
pub(crate) fn into_degraded_ref<'a>(pin: impl Peripheral<P = impl Pin + 'a> + 'a) -> PeripheralRef<'a, Self> {
PeripheralRef::new(AnyPin {
pin_bank: pin.into_ref().pin_bank(),
})
}
}
macro_rules! into_degraded_ref {
($($name:ident),*) => {
$(
let $name = $crate::gpio::AnyPin::into_degraded_ref($name);
)*
};
}
impl_peripheral!(AnyPin); impl_peripheral!(AnyPin);
impl Pin for AnyPin {} impl Pin for AnyPin {}
@ -695,6 +679,12 @@ macro_rules! impl_pin {
($bank as u8) * 32 + $pin_num ($bank as u8) * 32 + $pin_num
} }
} }
impl From<peripherals::$name> for crate::gpio::AnyPin {
fn from(val: peripherals::$name) -> Self {
crate::gpio::Pin::degrade(val)
}
}
}; };
} }

19
embassy-rp/src/spi.rs
View File

@ -65,8 +65,15 @@ impl<'d, T: Instance> Spi<'d, T> {
miso: impl Peripheral<P = impl MisoPin<T> + 'd> + 'd, miso: impl Peripheral<P = impl MisoPin<T> + 'd> + 'd,
config: Config, config: Config,
) -> Self { ) -> Self {
into_degraded_ref!(clk, mosi, miso); into_ref!(clk, mosi, miso);
Self::new_inner(inner, Some(clk), Some(mosi), Some(miso), None, config) Self::new_inner(
inner,
Some(clk.map_into()),
Some(mosi.map_into()),
Some(miso.map_into()),
None,
config,
)
} }
pub fn new_txonly( pub fn new_txonly(
@ -75,8 +82,8 @@ impl<'d, T: Instance> Spi<'d, T> {
mosi: impl Peripheral<P = impl MosiPin<T> + 'd> + 'd, mosi: impl Peripheral<P = impl MosiPin<T> + 'd> + 'd,
config: Config, config: Config,
) -> Self { ) -> Self {
into_degraded_ref!(clk, mosi); into_ref!(clk, mosi);
Self::new_inner(inner, Some(clk), Some(mosi), None, None, config) Self::new_inner(inner, Some(clk.map_into()), Some(mosi.map_into()), None, None, config)
} }
pub fn new_rxonly( pub fn new_rxonly(
@ -85,8 +92,8 @@ impl<'d, T: Instance> Spi<'d, T> {
miso: impl Peripheral<P = impl MisoPin<T> + 'd> + 'd, miso: impl Peripheral<P = impl MisoPin<T> + 'd> + 'd,
config: Config, config: Config,
) -> Self { ) -> Self {
into_degraded_ref!(clk, miso); into_ref!(clk, miso);
Self::new_inner(inner, Some(clk), None, Some(miso), None, config) Self::new_inner(inner, Some(clk.map_into()), None, Some(miso.map_into()), None, config)
} }
fn new_inner( fn new_inner(