Merge pull request #1351 from embassy-rs/c0-hil
stm32/tests: add C0 hil tests.
This commit is contained in:
commit
f06554cf1d
1
ci.sh
1
ci.sh
@ -117,6 +117,7 @@ cargo batch \
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--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32f429zi --out-dir out/tests/nucleo-stm32f429zi \
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--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32f429zi --out-dir out/tests/nucleo-stm32f429zi \
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--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32g491re --out-dir out/tests/nucleo-stm32g491re \
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--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32g491re --out-dir out/tests/nucleo-stm32g491re \
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--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32g071rb --out-dir out/tests/nucleo-stm32g071rb \
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--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32g071rb --out-dir out/tests/nucleo-stm32g071rb \
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--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32c031c6 --out-dir out/tests/nucleo-stm32c031c6 \
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--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h755zi --out-dir out/tests/nucleo-stm32h755zi \
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--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h755zi --out-dir out/tests/nucleo-stm32h755zi \
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--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32wb55rg --out-dir out/tests/nucleo-stm32wb55rg \
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--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32wb55rg --out-dir out/tests/nucleo-stm32wb55rg \
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--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h563zi --out-dir out/tests/nucleo-stm32h563zi \
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--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h563zi --out-dir out/tests/nucleo-stm32h563zi \
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@ -58,7 +58,7 @@ sdio-host = "0.5.0"
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embedded-sdmmc = { git = "https://github.com/embassy-rs/embedded-sdmmc-rs", rev = "46d1b1c2ff13e31e282ec1e352421721694f126a", optional = true }
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embedded-sdmmc = { git = "https://github.com/embassy-rs/embedded-sdmmc-rs", rev = "46d1b1c2ff13e31e282ec1e352421721694f126a", optional = true }
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critical-section = "1.1"
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critical-section = "1.1"
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atomic-polyfill = "1.0.1"
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atomic-polyfill = "1.0.1"
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stm32-metapac = "5"
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stm32-metapac = "6"
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vcell = "0.1.3"
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vcell = "0.1.3"
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bxcan = "0.7.0"
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bxcan = "0.7.0"
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nb = "1.0.0"
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nb = "1.0.0"
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@ -73,7 +73,7 @@ critical-section = { version = "1.1", features = ["std"] }
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[build-dependencies]
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[build-dependencies]
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proc-macro2 = "1.0.36"
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proc-macro2 = "1.0.36"
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quote = "1.0.15"
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quote = "1.0.15"
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stm32-metapac = { version = "5", default-features = false, features = ["metadata"]}
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stm32-metapac = { version = "6", default-features = false, features = ["metadata"]}
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[features]
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[features]
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default = ["stm32-metapac/rt"]
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default = ["stm32-metapac/rt"]
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@ -1,7 +1,7 @@
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# Before upgrading check that everything is available on all tier1 targets here:
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# Before upgrading check that everything is available on all tier1 targets here:
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# https://rust-lang.github.io/rustup-components-history
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# https://rust-lang.github.io/rustup-components-history
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[toolchain]
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[toolchain]
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channel = "nightly-2023-04-02"
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channel = "nightly-2023-04-11"
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components = [ "rust-src", "rustfmt", "llvm-tools-preview" ]
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components = [ "rust-src", "rustfmt", "llvm-tools-preview" ]
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targets = [
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targets = [
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"thumbv7em-none-eabi",
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"thumbv7em-none-eabi",
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@ -8,6 +8,7 @@ license = "MIT OR Apache-2.0"
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stm32f103c8 = ["embassy-stm32/stm32f103c8"] # Blue Pill
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stm32f103c8 = ["embassy-stm32/stm32f103c8"] # Blue Pill
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stm32f429zi = ["embassy-stm32/stm32f429zi"] # Nucleo
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stm32f429zi = ["embassy-stm32/stm32f429zi"] # Nucleo
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stm32g071rb = ["embassy-stm32/stm32g071rb"] # Nucleo
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stm32g071rb = ["embassy-stm32/stm32g071rb"] # Nucleo
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stm32c031c6 = ["embassy-stm32/stm32c031c6"] # Nucleo
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stm32g491re = ["embassy-stm32/stm32g491re"] # Nucleo
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stm32g491re = ["embassy-stm32/stm32g491re"] # Nucleo
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stm32h755zi = ["embassy-stm32/stm32h755zi-cm7"] # Nucleo
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stm32h755zi = ["embassy-stm32/stm32h755zi-cm7"] # Nucleo
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stm32wb55rg = ["embassy-stm32/stm32wb55rg"] # Nucleo
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stm32wb55rg = ["embassy-stm32/stm32wb55rg"] # Nucleo
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@ -18,7 +19,7 @@ stm32u585ai = ["embassy-stm32/stm32u585ai"] # IoT board
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embassy-sync = { version = "0.1.0", path = "../../embassy-sync", features = ["defmt"] }
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embassy-sync = { version = "0.1.0", path = "../../embassy-sync", features = ["defmt"] }
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embassy-executor = { version = "0.1.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] }
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embassy-executor = { version = "0.1.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] }
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embassy-time = { version = "0.1.0", path = "../../embassy-time", features = ["defmt", "tick-hz-32_768"] }
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embassy-time = { version = "0.1.0", path = "../../embassy-time", features = ["defmt", "tick-hz-32_768"] }
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embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["nightly", "defmt", "unstable-pac", "memory-x", "time-driver-tim2"] }
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embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["nightly", "defmt", "unstable-pac", "memory-x", "time-driver-any"] }
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defmt = "0.3.0"
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defmt = "0.3.0"
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defmt-rtt = "0.4"
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defmt-rtt = "0.4"
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@ -9,7 +9,13 @@ fn main() -> Result<(), Box<dyn Error>> {
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println!("cargo:rerun-if-changed=link_ram.x");
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println!("cargo:rerun-if-changed=link_ram.x");
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println!("cargo:rustc-link-arg-bins=--nmagic");
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println!("cargo:rustc-link-arg-bins=--nmagic");
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// too little RAM to run from RAM.
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#[cfg(any(feature = "stm32c031c6"))]
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println!("cargo:rustc-link-arg-bins=-Tlink.x");
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#[cfg(not(any(feature = "stm32c031c6")))]
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println!("cargo:rustc-link-arg-bins=-Tlink_ram.x");
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println!("cargo:rustc-link-arg-bins=-Tlink_ram.x");
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println!("cargo:rustc-link-arg-bins=-Tdefmt.x");
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println!("cargo:rustc-link-arg-bins=-Tdefmt.x");
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Ok(())
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Ok(())
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@ -32,6 +32,8 @@ async fn main(_spawner: Spawner) {
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let (mut a, mut b) = (p.PD9, p.PD8);
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let (mut a, mut b) = (p.PD9, p.PD8);
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#[cfg(feature = "stm32h563zi")]
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#[cfg(feature = "stm32h563zi")]
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let (mut a, mut b) = (p.PB6, p.PB7);
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let (mut a, mut b) = (p.PB6, p.PB7);
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#[cfg(feature = "stm32c031c6")]
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let (mut a, mut b) = (p.PB6, p.PB7);
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// Test initial output
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// Test initial output
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{
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{
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@ -32,6 +32,8 @@ async fn main(_spawner: Spawner) {
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let (spi, sck, mosi, miso) = (p.SPI1, p.PE13, p.PE15, p.PE14);
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let (spi, sck, mosi, miso) = (p.SPI1, p.PE13, p.PE15, p.PE14);
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#[cfg(feature = "stm32h563zi")]
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#[cfg(feature = "stm32h563zi")]
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let (spi, sck, mosi, miso) = (p.SPI4, p.PE12, p.PE14, p.PE13);
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let (spi, sck, mosi, miso) = (p.SPI4, p.PE12, p.PE14, p.PE13);
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#[cfg(feature = "stm32c031c6")]
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let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6);
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info!("asdfa;");
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info!("asdfa;");
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let mut spi = Spi::new(
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let mut spi = Spi::new(
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@ -49,7 +51,7 @@ async fn main(_spawner: Spawner) {
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// Arduino pins D11 and D12 (MOSI-MISO) are connected together with a 1K resistor.
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// Arduino pins D11 and D12 (MOSI-MISO) are connected together with a 1K resistor.
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// so we should get the data we sent back.
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// so we should get the data we sent back.
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let mut buf = data;
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let mut buf = [0; 9];
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spi.blocking_transfer(&mut buf, &data).unwrap();
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spi.blocking_transfer(&mut buf, &data).unwrap();
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assert_eq!(buf, data);
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assert_eq!(buf, data);
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@ -31,6 +31,8 @@ async fn main(_spawner: Spawner) {
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let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PE13, p.PE15, p.PE14, p.GPDMA1_CH0, p.GPDMA1_CH1);
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let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PE13, p.PE15, p.PE14, p.GPDMA1_CH0, p.GPDMA1_CH1);
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#[cfg(feature = "stm32h563zi")]
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#[cfg(feature = "stm32h563zi")]
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let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI4, p.PE12, p.PE14, p.PE13, p.GPDMA1_CH0, p.GPDMA1_CH1);
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let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI4, p.PE12, p.PE14, p.PE13, p.GPDMA1_CH0, p.GPDMA1_CH1);
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#[cfg(feature = "stm32c031c6")]
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let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
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let mut spi = Spi::new(
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let mut spi = Spi::new(
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spi,
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spi,
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@ -34,6 +34,8 @@ async fn main(_spawner: Spawner) {
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let (tx, rx, usart, irq) = (p.PD8, p.PD9, p.USART3, interrupt::take!(USART3));
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let (tx, rx, usart, irq) = (p.PD8, p.PD9, p.USART3, interrupt::take!(USART3));
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#[cfg(feature = "stm32h563zi")]
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#[cfg(feature = "stm32h563zi")]
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let (tx, rx, usart, irq) = (p.PB6, p.PB7, p.LPUART1, interrupt::take!(LPUART1));
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let (tx, rx, usart, irq) = (p.PB6, p.PB7, p.LPUART1, interrupt::take!(LPUART1));
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#[cfg(feature = "stm32c031c6")]
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let (tx, rx, usart, irq) = (p.PB6, p.PB7, p.USART1, interrupt::take!(USART1));
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let config = Config::default();
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let config = Config::default();
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let mut usart = Uart::new(usart, rx, tx, irq, NoDma, NoDma, config);
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let mut usart = Uart::new(usart, rx, tx, irq, NoDma, NoDma, config);
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@ -71,6 +71,9 @@ async fn main(_spawner: Spawner) {
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p.GPDMA1_CH0,
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p.GPDMA1_CH0,
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p.GPDMA1_CH1,
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p.GPDMA1_CH1,
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);
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);
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#[cfg(feature = "stm32c031c6")]
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let (tx, rx, usart, irq, tx_dma, rx_dma) =
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(p.PB6, p.PB7, p.USART1, interrupt::take!(USART1), p.DMA1_CH1, p.DMA1_CH2);
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let config = Config::default();
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let config = Config::default();
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let mut usart = Uart::new(usart, rx, tx, irq, tx_dma, rx_dma, config);
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let mut usart = Uart::new(usart, rx, tx, irq, tx_dma, rx_dma, config);
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