Adjust for STM32U5.

embassy-stm32/src/exti.rs

@@ -30,11 +30,11 @@ fn cpu_regs() -> pac::exti::Exti {
     EXTI
 }
 
-#[cfg(not(any(exti_g0, exti_l5, gpio_v1)))]
+#[cfg(not(any(exti_g0, exti_l5, gpio_v1, exti_u5)))]
 fn exticr_regs() -> pac::syscfg::Syscfg {
     pac::SYSCFG
 }
-#[cfg(any(exti_g0, exti_l5))]
+#[cfg(any(exti_g0, exti_l5, exti_u5))]
 fn exticr_regs() -> pac::exti::Exti {
     EXTI
 }
@@ -44,9 +44,9 @@ fn exticr_regs() -> pac::afio::Afio {
 }
 
 pub unsafe fn on_irq() {
-    #[cfg(not(any(exti_g0, exti_l5)))]
+    #[cfg(not(any(exti_g0, exti_l5, exti_u5)))]
     let bits = EXTI.pr(0).read().0;
-    #[cfg(any(exti_g0, exti_l5))]
+    #[cfg(any(exti_g0, exti_l5, exti_u5))]
     let bits = EXTI.rpr(0).read().0 | EXTI.fpr(0).read().0;
 
     // Mask all the channels that fired.
@@ -58,9 +58,9 @@ pub unsafe fn on_irq() {
     }
 
     // Clear pending
-    #[cfg(not(any(exti_g0, exti_l5)))]
+    #[cfg(not(any(exti_g0, exti_l5, exti_u5)))]
     EXTI.pr(0).write_value(Lines(bits));
-    #[cfg(any(exti_g0, exti_l5))]
+    #[cfg(any(exti_g0, exti_l5, exti_u5))]
     {
         EXTI.rpr(0).write_value(Lines(bits));
         EXTI.fpr(0).write_value(Lines(bits));
@@ -148,9 +148,9 @@ impl<'a> ExtiInputFuture<'a> {
             EXTI.ftsr(0).modify(|w| w.set_line(pin, falling));
 
             // clear pending bit
-            #[cfg(not(any(exti_g0, exti_l5)))]
+            #[cfg(not(any(exti_g0, exti_l5, exti_u5)))]
             EXTI.pr(0).write(|w| w.set_line(pin, true));
-            #[cfg(any(exti_g0, exti_l5))]
+            #[cfg(any(exti_g0, exti_l5, exti_u5))]
             {
                 EXTI.rpr(0).write(|w| w.set_line(pin, true));
                 EXTI.fpr(0).write(|w| w.set_line(pin, true));

embassy-stm32/src/pwr/mod.rs

@@ -4,6 +4,7 @@
 #[cfg_attr(pwr_wl5, path = "wl5.rs")]
 #[cfg_attr(pwr_g0, path = "g0.rs")]
 #[cfg_attr(pwr_l1, path = "l1.rs")]
+#[cfg_attr(pwr_u5, path = "u5.rs")]
 mod _version;
 
 pub use _version::*;

embassy-stm32/src/rcc/mod.rs

@@ -24,19 +24,19 @@ pub struct Clocks {
     #[cfg(not(rcc_g0))]
     pub apb2_tim: Hertz,
 
-    #[cfg(rcc_wl5)]
+    #[cfg(any(rcc_wl5, rcc_u5))]
     pub apb3: Hertz,
 
     #[cfg(any(rcc_l0, rcc_l1, rcc_f0, rcc_f1, rcc_f0x0, rcc_g0))]
     pub ahb: Hertz,
 
-    #[cfg(any(rcc_l4, rcc_f4, rcc_f7, rcc_h7, rcc_wb, rcc_wl5))]
+    #[cfg(any(rcc_l4, rcc_f4, rcc_f7, rcc_h7, rcc_u5, rcc_wb, rcc_wl5))]
     pub ahb1: Hertz,
 
-    #[cfg(any(rcc_l4, rcc_f4, rcc_f7, rcc_h7, rcc_wb, rcc_wl5))]
+    #[cfg(any(rcc_l4, rcc_f4, rcc_f7, rcc_h7, rcc_u5, rcc_wb, rcc_wl5))]
     pub ahb2: Hertz,
 
-    #[cfg(any(rcc_l4, rcc_f4, rcc_f7, rcc_h7, rcc_wb, rcc_wl5))]
+    #[cfg(any(rcc_l4, rcc_f4, rcc_f7, rcc_h7, rcc_u5, rcc_wb, rcc_wl5))]
     pub ahb3: Hertz,
 
     #[cfg(any(rcc_h7))]
@@ -100,6 +100,9 @@ cfg_if::cfg_if! {
     } else if #[cfg(any(rcc_g0))] {
         mod g0;
         pub use g0::*;
+    } else if #[cfg(any(rcc_u5))] {
+        mod u5;
+        pub use u5::*;
     }
 }
 

embassy-stm32/src/rcc/u5/mod.rs

@@ -0,0 +1,15 @@
+pub struct Config {}
+
+impl Config {
+    pub fn new() -> Self {
+        Config {}
+    }
+}
+
+impl Default for Config {
+    fn default() -> Self {
+        Config::new()
+    }
+}
+
+pub unsafe fn init(config: Config) {}