Merge pull request #1909 from xoviat/adc
stm32: generate adc_common and misc.
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commit
f27620cc0b
@ -817,6 +817,17 @@ fn main() {
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let mut peripherals_table: Vec<Vec<String>> = Vec::new();
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let mut pins_table: Vec<Vec<String>> = Vec::new();
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let mut dma_channels_table: Vec<Vec<String>> = Vec::new();
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let mut adc_common_table: Vec<Vec<String>> = Vec::new();
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/*
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If ADC3_COMMON exists, ADC3 and higher are assigned to it
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All other ADCs are assigned to ADC_COMMON
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ADC3 and higher are assigned to the adc34 clock in the table
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The adc3_common cfg directive is added if ADC3_COMMON exists
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*/
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let has_adc3 = METADATA.peripherals.iter().find(|p| p.name == "ADC3_COMMON").is_some();
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let set_adc345 = HashSet::from(["ADC3", "ADC4", "ADC5"]);
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for m in METADATA
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.memory
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@ -854,6 +865,17 @@ fn main() {
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}
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}
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if regs.kind == "adc" {
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let (adc_common, adc_clock) = if set_adc345.contains(p.name) && has_adc3 {
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("ADC3_COMMON", "adc34")
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} else {
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("ADC_COMMON", "adc")
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};
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let row = vec![p.name.to_string(), adc_common.to_string(), adc_clock.to_string()];
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adc_common_table.push(row);
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}
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for irq in p.interrupts {
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let row = vec![
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p.name.to_string(),
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@ -932,6 +954,7 @@ fn main() {
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make_table(&mut m, "foreach_peripheral", &peripherals_table);
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make_table(&mut m, "foreach_pin", &pins_table);
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make_table(&mut m, "foreach_dma_channel", &dma_channels_table);
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make_table(&mut m, "foreach_adc", &adc_common_table);
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let out_dir = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
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let out_file = out_dir.join("_macros.rs").to_string_lossy().to_string();
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@ -973,6 +996,12 @@ fn main() {
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println!("cargo:rustc-cfg={}x{}", &chip_name[..9], &chip_name[10..11]);
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}
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// =======
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// ADC3_COMMON is present
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if has_adc3 {
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println!("cargo:rustc-cfg={}", "adc3_common");
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}
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// =======
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// Features for targeting groups of chips
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@ -50,7 +50,7 @@ impl<'d, T: Instance> Adc<'d, T> {
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while T::regs().cr().read().adcal() {}
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// Wait more than 4 clock cycles after adcal is cleared (RM0364 p. 223)
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delay.delay_us(6 * 1_000_000 / Self::freq().0);
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delay.delay_us(1 + (6 * 1_000_000 / Self::freq().0));
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// Enable the adc
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T::regs().cr().modify(|w| w.set_aden(true));
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@ -56,127 +56,21 @@ pub trait Instance: sealed::Instance + crate::Peripheral<P = Self> + crate::rcc:
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pub trait AdcPin<T: Instance>: sealed::AdcPin<T> {}
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pub trait InternalChannel<T>: sealed::InternalChannel<T> {}
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#[cfg(not(any(stm32h7, adc_f3, adc_v4)))]
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foreach_peripheral!(
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(adc, $inst:ident) => {
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foreach_adc!(
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($inst:ident, $common_inst:ident, $clock:ident) => {
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impl crate::adc::sealed::Instance for peripherals::$inst {
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fn regs() -> crate::pac::adc::Adc {
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crate::pac::$inst
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}
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#[cfg(not(any(adc_f1, adc_v1, adc_f3_v2, adc_g0)))]
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fn common_regs() -> crate::pac::adccommon::AdcCommon {
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foreach_peripheral!{
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(adccommon, $common_inst:ident) => {
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return crate::pac::$common_inst
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};
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}
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}
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}
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impl crate::adc::Instance for peripherals::$inst {}
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};
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);
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#[cfg(any(stm32h7, adc_f3, adc_v4))]
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foreach_peripheral!(
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(adc, ADC3) => {
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impl crate::adc::sealed::Instance for peripherals::ADC3 {
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fn regs() -> crate::pac::adc::Adc {
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crate::pac::ADC3
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}
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#[cfg(all(not(adc_f1), not(adc_v1)))]
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#[allow(unreachable_code)]
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fn common_regs() -> crate::pac::adccommon::AdcCommon {
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foreach_peripheral!{
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(adccommon, ADC3_COMMON) => {
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return crate::pac::ADC3_COMMON
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};
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// Fall back to ADC_COMMON if ADC3_COMMON does not exist
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(adccommon, ADC_COMMON) => {
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return crate::pac::ADC_COMMON
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};
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}
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return crate::pac::$common_inst
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}
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#[cfg(adc_f3)]
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fn frequency() -> crate::time::Hertz {
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unsafe { crate::rcc::get_freqs() }.adc34.unwrap()
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}
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}
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impl crate::adc::Instance for peripherals::ADC3 {}
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};
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(adc, ADC4) => {
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impl crate::adc::sealed::Instance for peripherals::ADC4 {
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fn regs() -> crate::pac::adc::Adc {
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crate::pac::ADC4
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}
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#[cfg(not(any(adc_f1, adc_v1)))]
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#[allow(unreachable_code)]
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fn common_regs() -> crate::pac::adccommon::AdcCommon {
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foreach_peripheral!{
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(adccommon, ADC3_COMMON) => {
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return crate::pac::ADC3_COMMON
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};
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// Fall back to ADC_COMMON if ADC3_COMMON does not exist
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(adccommon, ADC_COMMON) => {
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return crate::pac::ADC_COMMON
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};
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}
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}
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#[cfg(adc_f3)]
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fn frequency() -> crate::time::Hertz {
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unsafe { crate::rcc::get_freqs() }.adc34.unwrap()
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}
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}
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impl crate::adc::Instance for peripherals::ADC4 {}
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};
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(adc, ADC5) => {
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impl crate::adc::sealed::Instance for peripherals::ADC5 {
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fn regs() -> crate::pac::adc::Adc {
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crate::pac::ADC5
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}
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#[cfg(not(any(adc_f1, adc_v1)))]
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#[allow(unreachable_code)]
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fn common_regs() -> crate::pac::adccommon::AdcCommon {
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foreach_peripheral!{
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(adccommon, ADC3_COMMON) => {
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return crate::pac::ADC3_COMMON
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};
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// Fall back to ADC_COMMON if ADC3_COMMON does not exist
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(adccommon, ADC_COMMON) => {
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return crate::pac::ADC_COMMON
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};
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}
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}
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#[cfg(adc_f3)]
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fn frequency() -> crate::time::Hertz {
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unsafe { crate::rcc::get_freqs() }.adc34.unwrap()
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}
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}
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impl crate::adc::Instance for peripherals::ADC5 {}
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};
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(adc, $inst:ident) => {
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impl crate::adc::sealed::Instance for peripherals::$inst {
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fn regs() -> crate::pac::adc::Adc {
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crate::pac::$inst
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}
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#[cfg(not(any(adc_f1, adc_v1)))]
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fn common_regs() -> crate::pac::adccommon::AdcCommon {
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foreach_peripheral!{
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(adccommon, ADC_COMMON) => {
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return crate::pac::ADC_COMMON
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};
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}
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}
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#[cfg(adc_f3)]
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fn frequency() -> crate::time::Hertz {
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unsafe { crate::rcc::get_freqs() }.adc.unwrap()
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unsafe { crate::rcc::get_freqs() }.$clock.unwrap()
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}
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}
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@ -280,7 +280,7 @@ pub(crate) unsafe fn init(config: Config) {
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}
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});
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#[cfg(rcc_f3)]
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#[cfg(all(rcc_f3, adc3_common))]
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let adc34 = config.adc.map(|adc| {
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if !adc.is_bus() {
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RCC.cfgr2().modify(|w| {
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@ -291,9 +291,13 @@ pub(crate) unsafe fn init(config: Config) {
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Hertz(sysclk / adc as u32)
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})
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} else {
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// TODO: need to use only if adc32_common is present
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crate::pac::ADC3_COMMON.ccr().modify(|w| {
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assert!(!(adc.bus_div() == 1 && hpre_bits != Hpre::DIV1));
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todo!()
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w.set_ckmode(adc.into());
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Hertz(sysclk / adc.bus_div() as u32)
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})
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}
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});
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@ -323,8 +327,10 @@ pub(crate) unsafe fn init(config: Config) {
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ahb1: Hertz(hclk),
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#[cfg(rcc_f3)]
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adc: adc,
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#[cfg(rcc_f3)]
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#[cfg(all(rcc_f3, adc3_common))]
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adc34: adc34,
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#[cfg(all(rcc_f3, not(adc3_common)))]
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adc34: None,
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#[cfg(stm32f334)]
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hrtim: hrtim,
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});
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