From f3699e67b913618276dfec90e6cbf59925f80015 Mon Sep 17 00:00:00 2001
From: Sebastian Goll <sebastian.goll@gmx.de>
Date: Wed, 12 Apr 2023 02:07:31 +0200
Subject: [PATCH] Fix typo in derivation of PLLP divisor

---
 embassy-stm32/src/rcc/f2.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/embassy-stm32/src/rcc/f2.rs b/embassy-stm32/src/rcc/f2.rs
index d543888c..bcae64d0 100644
--- a/embassy-stm32/src/rcc/f2.rs
+++ b/embassy-stm32/src/rcc/f2.rs
@@ -148,7 +148,7 @@ impl Into<Pllp> for PLLMainDiv {
         match self {
             PLLMainDiv::Div2 => Pllp::DIV2,
             PLLMainDiv::Div4 => Pllp::DIV4,
-            PLLMainDiv::Div6 => Pllp::DIV8,
+            PLLMainDiv::Div6 => Pllp::DIV6,
             PLLMainDiv::Div8 => Pllp::DIV8,
         }
     }