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stm32/test: add C0 hil tests.

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This commit is contained in:
Dario Nieuwenhuis 2023-04-11 13:37:10 +02:00
parent 35a34afbc2
commit f5df567619
9 changed files with 23 additions and 4 deletions
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1
ci.sh
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@ -117,6 +117,7 @@ cargo batch \
--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32f429zi --out-dir out/tests/nucleo-stm32f429zi \
--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32g491re --out-dir out/tests/nucleo-stm32g491re \
--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32g071rb --out-dir out/tests/nucleo-stm32g071rb \
--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32c031c6 --out-dir out/tests/nucleo-stm32c031c6 \
--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h755zi --out-dir out/tests/nucleo-stm32h755zi \
--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32wb55rg --out-dir out/tests/nucleo-stm32wb55rg \
--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h563zi --out-dir out/tests/nucleo-stm32h563zi \

4
embassy-stm32/Cargo.toml
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@ -58,7 +58,7 @@ sdio-host = "0.5.0"
embedded-sdmmc = { git = "https://github.com/embassy-rs/embedded-sdmmc-rs", rev = "46d1b1c2ff13e31e282ec1e352421721694f126a", optional = true }
critical-section = "1.1"
atomic-polyfill = "1.0.1"
stm32-metapac = "5"
stm32-metapac = "6"
vcell = "0.1.3"
bxcan = "0.7.0"
nb = "1.0.0"
@ -73,7 +73,7 @@ critical-section = { version = "1.1", features = ["std"] }
[build-dependencies]
proc-macro2 = "1.0.36"
quote = "1.0.15"
stm32-metapac = { version = "5", default-features = false, features = ["metadata"]}
stm32-metapac = { version = "6", default-features = false, features = ["metadata"]}
[features]
default = ["stm32-metapac/rt"]

3
tests/stm32/Cargo.toml
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@ -8,6 +8,7 @@ license = "MIT OR Apache-2.0"
stm32f103c8 = ["embassy-stm32/stm32f103c8"] # Blue Pill
stm32f429zi = ["embassy-stm32/stm32f429zi"] # Nucleo
stm32g071rb = ["embassy-stm32/stm32g071rb"] # Nucleo
stm32c031c6 = ["embassy-stm32/stm32c031c6"] # Nucleo
stm32g491re = ["embassy-stm32/stm32g491re"] # Nucleo
stm32h755zi = ["embassy-stm32/stm32h755zi-cm7"] # Nucleo
stm32wb55rg = ["embassy-stm32/stm32wb55rg"] # Nucleo
@ -18,7 +19,7 @@ stm32u585ai = ["embassy-stm32/stm32u585ai"] # IoT board
embassy-sync = { version = "0.1.0", path = "../../embassy-sync", features = ["defmt"] }
embassy-executor = { version = "0.1.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] }
embassy-time = { version = "0.1.0", path = "../../embassy-time", features = ["defmt", "tick-hz-32_768"] }
embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["nightly", "defmt", "unstable-pac", "memory-x", "time-driver-tim2"] }
embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["nightly", "defmt", "unstable-pac", "memory-x", "time-driver-any"] }
defmt = "0.3.0"
defmt-rtt = "0.4"

6
tests/stm32/build.rs
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@ -9,7 +9,13 @@ fn main() -> Result<(), Box<dyn Error>> {
println!("cargo:rerun-if-changed=link_ram.x");
println!("cargo:rustc-link-arg-bins=--nmagic");
// too little RAM to run from RAM.
#[cfg(any(feature = "stm32c031c6"))]
println!("cargo:rustc-link-arg-bins=-Tlink.x");
#[cfg(not(any(feature = "stm32c031c6")))]
println!("cargo:rustc-link-arg-bins=-Tlink_ram.x");
println!("cargo:rustc-link-arg-bins=-Tdefmt.x");
Ok(())

2
tests/stm32/src/bin/gpio.rs
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@ -32,6 +32,8 @@ async fn main(_spawner: Spawner) {
let (mut a, mut b) = (p.PD9, p.PD8);
#[cfg(feature = "stm32h563zi")]
let (mut a, mut b) = (p.PB6, p.PB7);
#[cfg(feature = "stm32c031c6")]
let (mut a, mut b) = (p.PB6, p.PB7);
// Test initial output
{

4
tests/stm32/src/bin/spi.rs
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@ -32,6 +32,8 @@ async fn main(_spawner: Spawner) {
let (spi, sck, mosi, miso) = (p.SPI1, p.PE13, p.PE15, p.PE14);
#[cfg(feature = "stm32h563zi")]
let (spi, sck, mosi, miso) = (p.SPI4, p.PE12, p.PE14, p.PE13);
#[cfg(feature = "stm32c031c6")]
let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6);
info!("asdfa;");
let mut spi = Spi::new(
@ -49,7 +51,7 @@ async fn main(_spawner: Spawner) {
// Arduino pins D11 and D12 (MOSI-MISO) are connected together with a 1K resistor.
// so we should get the data we sent back.
let mut buf = data;
let mut buf = [0; 9];
spi.blocking_transfer(&mut buf, &data).unwrap();
assert_eq!(buf, data);

2
tests/stm32/src/bin/spi_dma.rs
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@ -31,6 +31,8 @@ async fn main(_spawner: Spawner) {
let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PE13, p.PE15, p.PE14, p.GPDMA1_CH0, p.GPDMA1_CH1);
#[cfg(feature = "stm32h563zi")]
let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI4, p.PE12, p.PE14, p.PE13, p.GPDMA1_CH0, p.GPDMA1_CH1);
#[cfg(feature = "stm32c031c6")]
let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
let mut spi = Spi::new(
spi,

2
tests/stm32/src/bin/usart.rs
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@ -34,6 +34,8 @@ async fn main(_spawner: Spawner) {
let (tx, rx, usart, irq) = (p.PD8, p.PD9, p.USART3, interrupt::take!(USART3));
#[cfg(feature = "stm32h563zi")]
let (tx, rx, usart, irq) = (p.PB6, p.PB7, p.LPUART1, interrupt::take!(LPUART1));
#[cfg(feature = "stm32c031c6")]
let (tx, rx, usart, irq) = (p.PB6, p.PB7, p.USART1, interrupt::take!(USART1));
let config = Config::default();
let mut usart = Uart::new(usart, rx, tx, irq, NoDma, NoDma, config);

3
tests/stm32/src/bin/usart_dma.rs
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@ -71,6 +71,9 @@ async fn main(_spawner: Spawner) {
p.GPDMA1_CH0,
p.GPDMA1_CH1,
);
#[cfg(feature = "stm32c031c6")]
let (tx, rx, usart, irq, tx_dma, rx_dma) =
(p.PB6, p.PB7, p.USART1, interrupt::take!(USART1), p.DMA1_CH1, p.DMA1_CH2);
let config = Config::default();
let mut usart = Uart::new(usart, rx, tx, irq, tx_dma, rx_dma, config);