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cleanup

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This commit is contained in:
goueslati
2023-07-13 16:29:29 +01:00
parent 68792bb918
commit f90b170dad
7 changed files with 15 additions and 15 deletions
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2
embassy-stm32-wpan/Cargo.toml
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@ -29,7 +29,7 @@ stm32wb-hci = { version = "0.1.2", features = ["version-5-0"], optional = true }
bitflags = { version = "2.3.3", optional = true }
[features]
default = ["stm32wb55rg", "mac", "ble", "defmt"]
default = []
defmt = ["dep:defmt", "embassy-sync/defmt", "embassy-embedded-hal/defmt", "embassy-hal-common/defmt"]
ble = ["dep:stm32wb-hci"]

2
embassy-stm32-wpan/src/sub/mac/mod.rs
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@ -98,8 +98,6 @@ impl Mac {
let mut payload = [0u8; MAX_PACKET_SIZE];
cmd.copy_into_slice(&mut payload);
debug!("sending {}", &payload[..T::SIZE]);
let response = self
.tl_write_and_get_response(T::OPCODE as u16, &payload[..T::SIZE])
.await;

2
embassy-stm32-wpan/src/sub/mac/responses.rs
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@ -28,8 +28,6 @@ impl ParseableMacEvent for AssociateConfirm {
const SIZE: usize = 16;
fn try_parse(buf: &[u8]) -> Result<Self, ()> {
debug!("{}", buf);
Self::validate(buf)?;
Ok(Self {

8
embassy-stm32-wpan/src/sub/sys.rs
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@ -50,7 +50,7 @@ impl Sys {
}
/// `HW_IPCC_SYS_CmdEvtNot`
pub async fn write_and_get_response(&self, opcode: ShciOpcode, payload: &[u8]) -> SchiCommandStatus {
pub async fn write_and_get_response(&self, opcode: ShciOpcode, payload: &[u8]) -> Result<SchiCommandStatus, ()> {
self.write(opcode, payload).await;
Ipcc::flush(channels::cpu1::IPCC_SYSTEM_CMD_RSP_CHANNEL).await;
@ -59,12 +59,12 @@ impl Sys {
let p_command_event = &((*p_event_packet).evt_serial.evt.payload) as *const _ as *const CcEvt;
let p_payload = &((*p_command_event).payload) as *const u8;
ptr::read_volatile(p_payload).try_into().unwrap()
ptr::read_volatile(p_payload).try_into()
}
}
#[cfg(feature = "mac")]
pub async fn shci_c2_mac_802_15_4_init(&self) -> SchiCommandStatus {
pub async fn shci_c2_mac_802_15_4_init(&self) -> Result<SchiCommandStatus, ()> {
use crate::tables::{
Mac802_15_4Table, TracesTable, MAC_802_15_4_CMD_BUFFER, MAC_802_15_4_NOTIF_RSP_EVT_BUFFER,
TL_MAC_802_15_4_TABLE, TL_TRACES_TABLE, TRACES_EVT_QUEUE,
@ -88,7 +88,7 @@ impl Sys {
}
#[cfg(feature = "ble")]
pub async fn shci_c2_ble_init(&self, param: ShciBleInitCmdParam) -> SchiCommandStatus {
pub async fn shci_c2_ble_init(&self, param: ShciBleInitCmdParam) -> Result<SchiCommandStatus, ()> {
self.write_and_get_response(ShciOpcode::BleInit, param.payload()).await
}