rp/clocks: don't expose unstable pac items
exposing pac items kind of undermines the unstable-pac feature. directly exposing register structure is also pretty inconvenient since the clock switching code takes care of the src/aux difference in behavior, so a user needn't really be forced to write down decomposed register values.
This commit is contained in:
pennae
parent
d97a771479
commit
f97b591831
@ -6,11 +6,18 @@ use crate::{pac, reset, Peripheral};
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// TODO fix terrible use of global here
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static mut XIN_HZ: u32 = 0;
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pub use rp_pac::clocks::vals::{
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ClkAdcCtrlAuxsrc as AdcAuxsrc, ClkGpoutCtrlAuxsrc as GpoutSrc, ClkPeriCtrlAuxsrc as PeriClkAuxsrc,
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ClkRefCtrlAuxsrc as RefAuxsrc, ClkRtcCtrlAuxsrc as RtcAuxsrc, ClkSysCtrlAuxsrc as SysAuxsrc,
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ClkUsbCtrlAuxsrc as UsbAuxsrc,
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};
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#[repr(u8)]
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#[non_exhaustive]
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub enum PeriClkSrc {
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Sys = ClkPeriCtrlAuxsrc::CLK_SYS.0,
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PllSys = ClkPeriCtrlAuxsrc::CLKSRC_PLL_SYS.0,
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PllUsb = ClkPeriCtrlAuxsrc::CLKSRC_PLL_USB.0,
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Rosc = ClkPeriCtrlAuxsrc::ROSC_CLKSRC_PH.0,
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Xosc = ClkPeriCtrlAuxsrc::XOSC_CLKSRC.0,
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Gpin0 = ClkPeriCtrlAuxsrc::CLKSRC_GPIN0.0,
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Gpin1 = ClkPeriCtrlAuxsrc::CLKSRC_GPIN1.0,
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}
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#[non_exhaustive]
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pub struct ClockConfig {
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@ -18,7 +25,7 @@ pub struct ClockConfig {
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pub xosc: Option<XoscConfig>,
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pub ref_clk: RefClkConfig,
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pub sys_clk: SysClkConfig,
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pub peri_clk_src: Option<ClkPeriCtrlAuxsrc>,
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pub peri_clk_src: Option<PeriClkSrc>,
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pub usb_clk: Option<UsbClkConfig>,
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pub adc_clk: Option<AdcClkConfig>,
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pub rtc_clk: Option<RtcClkConfig>,
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@ -28,7 +35,7 @@ impl ClockConfig {
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pub fn crystal(crystal_hz: u32) -> Self {
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Self {
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rosc: Some(RoscConfig {
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range: pac::rosc::vals::FreqRange::MEDIUM,
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range: RoscRange::Medium,
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drive_strength: [0; 8],
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div: 16,
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}),
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@ -52,23 +59,23 @@ impl ClockConfig {
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div: 1,
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},
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sys_clk: SysClkConfig {
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src: SysClkSrc::Aux(ClkSysCtrlAuxsrc::CLKSRC_PLL_SYS),
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src: SysClkSrc::PllSys,
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div_int: 1,
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div_frac: 0,
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},
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peri_clk_src: Some(ClkPeriCtrlAuxsrc::CLK_SYS),
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peri_clk_src: Some(PeriClkSrc::Sys),
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usb_clk: Some(UsbClkConfig {
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src: ClkUsbCtrlAuxsrc::CLKSRC_PLL_USB,
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src: UsbClkSrc::PllUsb,
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div: 1,
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phase: 0,
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}),
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adc_clk: Some(AdcClkConfig {
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src: ClkAdcCtrlAuxsrc::CLKSRC_PLL_USB,
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src: AdcClkSrc::PllUsb,
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div: 1,
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phase: 0,
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}),
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rtc_clk: Some(RtcClkConfig {
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src: ClkRtcCtrlAuxsrc::CLKSRC_PLL_USB,
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src: RtcClkSrc::PllUsb,
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div_int: 1024,
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div_frac: 0,
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phase: 0,
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@ -79,7 +86,7 @@ impl ClockConfig {
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pub fn rosc() -> Self {
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Self {
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rosc: Some(RoscConfig {
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range: pac::rosc::vals::FreqRange::HIGH,
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range: RoscRange::High,
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drive_strength: [0; 8],
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div: 1,
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}),
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@ -89,19 +96,19 @@ impl ClockConfig {
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div: 1,
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},
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sys_clk: SysClkConfig {
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src: SysClkSrc::Aux(ClkSysCtrlAuxsrc::ROSC_CLKSRC),
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src: SysClkSrc::Rosc,
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div_int: 1,
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div_frac: 0,
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},
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peri_clk_src: Some(ClkPeriCtrlAuxsrc::ROSC_CLKSRC_PH),
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peri_clk_src: Some(PeriClkSrc::Rosc),
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usb_clk: None,
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adc_clk: Some(AdcClkConfig {
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src: ClkAdcCtrlAuxsrc::ROSC_CLKSRC_PH,
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src: AdcClkSrc::Rosc,
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div: 1,
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phase: 0,
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}),
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rtc_clk: Some(RtcClkConfig {
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src: ClkRtcCtrlAuxsrc::ROSC_CLKSRC_PH,
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src: RtcClkSrc::Rosc,
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div_int: 1024,
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div_frac: 0,
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phase: 0,
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@ -110,8 +117,18 @@ impl ClockConfig {
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}
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}
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#[repr(u16)]
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#[non_exhaustive]
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub enum RoscRange {
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Low = pac::rosc::vals::FreqRange::LOW.0,
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Medium = pac::rosc::vals::FreqRange::MEDIUM.0,
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High = pac::rosc::vals::FreqRange::HIGH.0,
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TooHigh = pac::rosc::vals::FreqRange::TOOHIGH.0,
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}
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pub struct RoscConfig {
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pub range: pac::rosc::vals::FreqRange,
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pub range: RoscRange,
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pub drive_strength: [u8; 8],
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pub div: u16,
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}
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@ -134,15 +151,30 @@ pub struct RefClkConfig {
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pub div: u8,
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}
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#[non_exhaustive]
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub enum RefClkSrc {
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// main sources
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Xosc,
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Rosc,
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Aux(ClkRefCtrlAuxsrc),
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// aux sources
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PllUsb,
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Gpin0,
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Gpin1,
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}
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#[non_exhaustive]
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub enum SysClkSrc {
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// main sources
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Ref,
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Aux(ClkSysCtrlAuxsrc),
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// aux sources
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PllSys,
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PllUsb,
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Rosc,
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Xosc,
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Gpin0,
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Gpin1,
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}
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pub struct SysClkConfig {
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@ -151,20 +183,56 @@ pub struct SysClkConfig {
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pub div_frac: u8,
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}
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#[repr(u8)]
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#[non_exhaustive]
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub enum UsbClkSrc {
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PllUsb = ClkUsbCtrlAuxsrc::CLKSRC_PLL_USB.0,
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PllSys = ClkUsbCtrlAuxsrc::CLKSRC_PLL_SYS.0,
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Rosc = ClkUsbCtrlAuxsrc::ROSC_CLKSRC_PH.0,
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Xosc = ClkUsbCtrlAuxsrc::XOSC_CLKSRC.0,
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Gpin0 = ClkUsbCtrlAuxsrc::CLKSRC_GPIN0.0,
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Gpin1 = ClkUsbCtrlAuxsrc::CLKSRC_GPIN1.0,
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}
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pub struct UsbClkConfig {
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pub src: ClkUsbCtrlAuxsrc,
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pub src: UsbClkSrc,
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pub div: u8,
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pub phase: u8,
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}
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#[repr(u8)]
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#[non_exhaustive]
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub enum AdcClkSrc {
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PllUsb = ClkAdcCtrlAuxsrc::CLKSRC_PLL_USB.0,
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PllSys = ClkAdcCtrlAuxsrc::CLKSRC_PLL_SYS.0,
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Rosc = ClkAdcCtrlAuxsrc::ROSC_CLKSRC_PH.0,
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Xosc = ClkAdcCtrlAuxsrc::XOSC_CLKSRC.0,
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Gpin0 = ClkAdcCtrlAuxsrc::CLKSRC_GPIN0.0,
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Gpin1 = ClkAdcCtrlAuxsrc::CLKSRC_GPIN1.0,
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}
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pub struct AdcClkConfig {
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pub src: ClkAdcCtrlAuxsrc,
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pub src: AdcClkSrc,
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pub div: u8,
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pub phase: u8,
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}
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#[repr(u8)]
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#[non_exhaustive]
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub enum RtcClkSrc {
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PllUsb = ClkRtcCtrlAuxsrc::CLKSRC_PLL_USB.0,
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PllSys = ClkRtcCtrlAuxsrc::CLKSRC_PLL_SYS.0,
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Rosc = ClkRtcCtrlAuxsrc::ROSC_CLKSRC_PH.0,
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Xosc = ClkRtcCtrlAuxsrc::XOSC_CLKSRC.0,
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Gpin0 = ClkRtcCtrlAuxsrc::CLKSRC_GPIN0.0,
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Gpin1 = ClkRtcCtrlAuxsrc::CLKSRC_GPIN1.0,
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}
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pub struct RtcClkConfig {
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pub src: ClkRtcCtrlAuxsrc,
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pub src: RtcClkSrc,
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pub div_int: u32,
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pub div_frac: u8,
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pub phase: u8,
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@ -229,27 +297,21 @@ pub(crate) unsafe fn init(config: ClockConfig) {
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}
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}
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let (ref_src, ref_aux) = {
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use {ClkRefCtrlAuxsrc as Aux, ClkRefCtrlSrc as Src};
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match config.ref_clk.src {
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RefClkSrc::Xosc => {
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RefClkSrc::Xosc => (Src::XOSC_CLKSRC, Aux::CLKSRC_PLL_USB),
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RefClkSrc::Rosc => (Src::ROSC_CLKSRC_PH, Aux::CLKSRC_PLL_USB),
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RefClkSrc::PllUsb => (Src::CLKSRC_CLK_REF_AUX, Aux::CLKSRC_PLL_USB),
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RefClkSrc::Gpin0 => (Src::CLKSRC_CLK_REF_AUX, Aux::CLKSRC_GPIN0),
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RefClkSrc::Gpin1 => (Src::CLKSRC_CLK_REF_AUX, Aux::CLKSRC_GPIN1),
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}
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};
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c.clk_ref_ctrl().write(|w| {
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w.set_src(ClkRefCtrlSrc::XOSC_CLKSRC);
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w.set_src(ref_src);
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w.set_auxsrc(ref_aux);
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});
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while c.clk_ref_selected().read() != 1 << ClkRefCtrlSrc::XOSC_CLKSRC.0 {}
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}
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RefClkSrc::Rosc => {
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c.clk_ref_ctrl().write(|w| {
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w.set_src(ClkRefCtrlSrc::ROSC_CLKSRC_PH);
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});
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while c.clk_ref_selected().read() != 1 << ClkRefCtrlSrc::ROSC_CLKSRC_PH.0 {}
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}
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RefClkSrc::Aux(src) => {
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c.clk_ref_ctrl().write(|w| {
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w.set_auxsrc(src);
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w.set_src(ClkRefCtrlSrc::CLKSRC_CLK_REF_AUX);
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});
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while c.clk_ref_selected().read() != 1 << ClkRefCtrlSrc::CLKSRC_CLK_REF_AUX.0 {}
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}
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}
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while c.clk_ref_selected().read() != 1 << ref_src.0 {}
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c.clk_ref_div().write(|w| {
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w.set_int(config.ref_clk.div);
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});
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@ -259,26 +321,27 @@ pub(crate) unsafe fn init(config: ClockConfig) {
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w.set_enable(true);
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});
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let (sys_src, sys_aux) = {
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use {ClkSysCtrlAuxsrc as Aux, ClkSysCtrlSrc as Src};
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match config.sys_clk.src {
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SysClkSrc::Ref => {
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c.clk_sys_ctrl().write(|w| {
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w.set_src(ClkSysCtrlSrc::CLK_REF);
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});
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SysClkSrc::Ref => (Src::CLK_REF, Aux::CLKSRC_PLL_SYS),
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SysClkSrc::PllSys => (Src::CLKSRC_CLK_SYS_AUX, Aux::CLKSRC_PLL_SYS),
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SysClkSrc::PllUsb => (Src::CLKSRC_CLK_SYS_AUX, Aux::CLKSRC_PLL_USB),
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SysClkSrc::Rosc => (Src::CLKSRC_CLK_SYS_AUX, Aux::ROSC_CLKSRC),
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SysClkSrc::Xosc => (Src::CLKSRC_CLK_SYS_AUX, Aux::XOSC_CLKSRC),
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SysClkSrc::Gpin0 => (Src::CLKSRC_CLK_SYS_AUX, Aux::CLKSRC_GPIN0),
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SysClkSrc::Gpin1 => (Src::CLKSRC_CLK_SYS_AUX, Aux::CLKSRC_GPIN1),
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}
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};
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if sys_src != ClkSysCtrlSrc::CLK_REF {
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c.clk_sys_ctrl().write(|w| w.set_src(ClkSysCtrlSrc::CLK_REF));
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while c.clk_sys_selected().read() != 1 << ClkSysCtrlSrc::CLK_REF.0 {}
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}
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SysClkSrc::Aux(src) => {
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c.clk_sys_ctrl().write(|w| {
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w.set_src(ClkSysCtrlSrc::CLK_REF);
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w.set_auxsrc(sys_aux);
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w.set_src(sys_src);
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});
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while c.clk_sys_selected().read() != 1 << ClkSysCtrlSrc::CLK_REF.0 {}
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c.clk_sys_ctrl().write(|w| {
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w.set_auxsrc(src);
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w.set_src(ClkSysCtrlSrc::CLKSRC_CLK_SYS_AUX);
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});
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while c.clk_sys_selected().read() != 1 << ClkSysCtrlSrc::CLKSRC_CLK_SYS_AUX.0 {}
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}
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}
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while c.clk_sys_selected().read() != 1 << sys_src.0 {}
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c.clk_sys_div().write(|w| {
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w.set_int(config.sys_clk.div_int);
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w.set_frac(config.sys_clk.div_frac);
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@ -289,7 +352,7 @@ pub(crate) unsafe fn init(config: ClockConfig) {
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if let Some(src) = config.peri_clk_src {
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c.clk_peri_ctrl().write(|w| {
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w.set_enable(true);
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w.set_auxsrc(src);
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w.set_auxsrc(ClkPeriCtrlAuxsrc(src as _));
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});
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} else {
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peris.set_spi0(false);
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@ -304,7 +367,7 @@ pub(crate) unsafe fn init(config: ClockConfig) {
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c.clk_usb_ctrl().write(|w| {
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w.set_phase(conf.phase);
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w.set_enable(true);
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w.set_auxsrc(conf.src);
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w.set_auxsrc(ClkUsbCtrlAuxsrc(conf.src as _));
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});
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} else {
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peris.set_usbctrl(false);
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@ -316,7 +379,7 @@ pub(crate) unsafe fn init(config: ClockConfig) {
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c.clk_adc_ctrl().write(|w| {
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w.set_phase(conf.phase);
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w.set_enable(true);
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w.set_auxsrc(conf.src);
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w.set_auxsrc(ClkAdcCtrlAuxsrc(conf.src as _));
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});
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} else {
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peris.set_adc(false);
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@ -334,7 +397,7 @@ pub(crate) unsafe fn init(config: ClockConfig) {
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c.clk_rtc_ctrl().write(|w| {
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w.set_phase(conf.phase);
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w.set_enable(true);
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w.set_auxsrc(conf.src);
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w.set_auxsrc(ClkRtcCtrlAuxsrc(conf.src as _));
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});
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} else {
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peris.set_rtc(false);
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@ -369,7 +432,7 @@ unsafe fn configure_rosc(config: RoscConfig) {
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p.ctrl().write(|w| {
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w.set_enable(pac::rosc::vals::Enable::ENABLE);
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w.set_freq_range(config.range);
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w.set_freq_range(pac::rosc::vals::FreqRange(config.range as u16));
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});
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}
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@ -671,6 +734,21 @@ impl_gpoutpin!(PIN_23, 1);
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impl_gpoutpin!(PIN_24, 2);
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impl_gpoutpin!(PIN_25, 3);
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#[repr(u8)]
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pub enum GpoutSrc {
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PllSys = ClkGpoutCtrlAuxsrc::CLKSRC_PLL_SYS.0,
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Gpin0 = ClkGpoutCtrlAuxsrc::CLKSRC_GPIN0.0,
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Gpin1 = ClkGpoutCtrlAuxsrc::CLKSRC_GPIN1.0,
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PllUsb = ClkGpoutCtrlAuxsrc::CLKSRC_PLL_USB.0,
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Rosc = ClkGpoutCtrlAuxsrc::ROSC_CLKSRC.0,
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Xosc = ClkGpoutCtrlAuxsrc::XOSC_CLKSRC.0,
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Sys = ClkGpoutCtrlAuxsrc::CLK_SYS.0,
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Usb = ClkGpoutCtrlAuxsrc::CLK_USB.0,
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Adc = ClkGpoutCtrlAuxsrc::CLK_ADC.0,
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Rtc = ClkGpoutCtrlAuxsrc::CLK_RTC.0,
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Ref = ClkGpoutCtrlAuxsrc::CLK_REF.0,
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}
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pub struct Gpout<'d, T: GpoutPin> {
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gpout: PeripheralRef<'d, T>,
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}
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@ -696,11 +774,11 @@ impl<'d, T: GpoutPin> Gpout<'d, T> {
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}
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}
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pub fn set_src(&self, src: ClkGpoutCtrlAuxsrc) {
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pub fn set_src(&self, src: GpoutSrc) {
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unsafe {
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let c = pac::CLOCKS;
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c.clk_gpout_ctrl(self.gpout.number()).modify(|w| {
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w.set_auxsrc(src);
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w.set_auxsrc(ClkGpoutCtrlAuxsrc(src as _));
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});
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}
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}
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@ -17,14 +17,14 @@ async fn main(_spawner: Spawner) {
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gpout3.enable();
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loop {
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gpout3.set_src(clocks::GpoutSrc::CLK_SYS);
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gpout3.set_src(clocks::GpoutSrc::Sys);
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info!(
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"Pin 25 is now outputing CLK_SYS/1000, should be toggling at {}",
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gpout3.get_freq()
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);
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Timer::after(Duration::from_secs(2)).await;
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gpout3.set_src(clocks::GpoutSrc::CLK_REF);
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gpout3.set_src(clocks::GpoutSrc::Ref);
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info!(
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"Pin 25 is now outputing CLK_REF/1000, should be toggling at {}",
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gpout3.get_freq()
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Loading…
Reference in New Issue
Block a user