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feat: Add spi support for STM32F1 variants

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This commit is contained in:
Tobias Pisani
2021-10-06 21:02:15 +02:00
parent a7c37d2ff4
commit f9a576d13d
3 changed files with 18 additions and 3 deletions
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1
embassy-stm32/src/spi/mod.rs
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@ -1,6 +1,7 @@
#![macro_use]
#[cfg_attr(spi_v1, path = "v1.rs")]
#[cfg_attr(spi_f1, path = "v1.rs")]
#[cfg_attr(spi_v2, path = "v2.rs")]
#[cfg_attr(spi_v3, path = "v3.rs")]
mod _version;

18
embassy-stm32/src/spi/v1.rs
View File

@ -414,7 +414,7 @@ fn write_word<W: Word>(regs: &'static crate::pac::spi::Spi, word: W) -> Result<(
let sr = unsafe { regs.sr().read() };
if sr.ovr() {
return Err(Error::Overrun);
} else if sr.fre() {
} else if sr_fre(sr) {
return Err(Error::Framing);
} else if sr.modf() {
return Err(Error::ModeFault);
@ -438,7 +438,7 @@ fn read_word<W: Word>(regs: &'static crate::pac::spi::Spi) -> Result<W, Error> {
return Err(Error::Overrun);
} else if sr.modf() {
return Err(Error::ModeFault);
} else if sr.fre() {
} else if sr_fre(sr) {
return Err(Error::Framing);
} else if sr.crcerr() {
return Err(Error::Crc);
@ -450,3 +450,17 @@ fn read_word<W: Word>(regs: &'static crate::pac::spi::Spi) -> Result<W, Error> {
}
}
}
// SPI on F1 is just V1 without FRE and FRF fields
// This driver only uses FRE, so add a simple function here to read fre on v1,
// and return false on f1
#[cfg(spi_v1)]
fn sr_fre(sr: crate::pac::spi::regs::Sr) -> bool {
sr.fre()
}
#[cfg(spi_f1)]
fn sr_fre(_sr: crate::pac::spi::regs::Sr) -> bool {
false
}