nrf: add owned Peripherals struct, migrate gpio and spim
This commit is contained in:
parent
d9aaa0edf8
commit
fcf6a63b5c
@ -6,6 +6,8 @@
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#[path = "../example_common.rs"]
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mod example_common;
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use embassy_nrf::gpio::{Level, Output};
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use embassy_nrf::peripherals::Peripherals;
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use embassy_traits::spi::FullDuplex;
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use example_common::*;
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@ -16,7 +18,6 @@ use embassy::util::Forever;
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use embedded_hal::digital::v2::*;
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use futures::pin_mut;
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use nrf52840_hal::clocks;
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use nrf52840_hal::gpio;
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use embassy_nrf::{interrupt, pac, rtc, spim};
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@ -24,25 +25,20 @@ use embassy_nrf::{interrupt, pac, rtc, spim};
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async fn run() {
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info!("running!");
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let p = unsafe { embassy_nrf::pac::Peripherals::steal() };
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let p0 = gpio::p0::Parts::new(p.P0);
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let mut p = unsafe { Peripherals::steal() };
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let pins = spim::Pins {
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sck: p0.p0_29.into_push_pull_output(gpio::Level::Low).degrade(),
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miso: Some(p0.p0_28.into_floating_input().degrade()),
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mosi: Some(p0.p0_30.into_push_pull_output(gpio::Level::Low).degrade()),
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};
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let config = spim::Config {
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pins,
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frequency: spim::Frequency::M16,
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mode: spim::MODE_0,
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orc: 0x00,
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};
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let mut ncs = p0.p0_31.into_push_pull_output(gpio::Level::High);
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let spim = spim::Spim::new(p.SPIM3, interrupt::take!(SPIM3), config);
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let mut irq = interrupt::take!(SPIM3);
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let spim = spim::Spim::new(p.spim3, irq, p.p0_29, p.p0_28, p.p0_30, config);
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pin_mut!(spim);
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let mut ncs = Output::new(p.p0_31, Level::High);
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// Example on how to talk to an ENC28J60 chip
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// softreset
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307
embassy-nrf/src/gpio.rs
Normal file
307
embassy-nrf/src/gpio.rs
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@ -0,0 +1,307 @@
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use core::convert::Infallible;
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use core::hint::unreachable_unchecked;
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use embedded_hal::digital::v2::{InputPin, OutputPin, StatefulOutputPin};
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use crate::pac;
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use crate::pac::p0 as gpio;
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use crate::peripherals;
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/// Represents a digital input or output level.
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#[derive(Debug, Eq, PartialEq)]
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pub enum Level {
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Low,
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High,
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}
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/// Represents a pull setting for an input.
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#[derive(Debug, Eq, PartialEq)]
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pub enum Pull {
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None,
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Up,
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Down,
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}
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/// A GPIO port with up to 32 pins.
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#[derive(Debug, Eq, PartialEq)]
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pub enum Port {
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/// Port 0, available on all nRF52 and nRF51 MCUs.
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Port0,
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/// Port 1, only available on some nRF52 MCUs.
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#[cfg(any(feature = "52833", feature = "52840"))]
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Port1,
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}
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pub struct Input<T: Pin> {
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pin: T,
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}
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impl<T: Pin> Input<T> {
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pub fn new(pin: T, pull: Pull) -> Self {
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pin.conf().write(|w| {
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w.dir().input();
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w.input().connect();
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match pull {
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Pull::None => {
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w.pull().disabled();
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}
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Pull::Up => {
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w.pull().pullup();
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}
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Pull::Down => {
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w.pull().pulldown();
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}
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}
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w.drive().s0s1();
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w.sense().disabled();
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w
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});
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Self { pin }
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}
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}
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impl<T: Pin> Drop for Input<T> {
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fn drop(&mut self) {
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self.pin.conf().reset();
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}
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}
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impl<T: Pin> InputPin for Input<T> {
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type Error = Infallible;
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fn is_high(&self) -> Result<bool, Self::Error> {
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self.is_low().map(|v| !v)
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}
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fn is_low(&self) -> Result<bool, Self::Error> {
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Ok(self.pin.block().in_.read().bits() & (1 << self.pin.pin()) == 0)
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}
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}
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pub struct Output<T: Pin> {
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pin: T,
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}
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impl<T: Pin> Output<T> {
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// TODO opendrain
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pub fn new(pin: T, initial_output: Level) -> Self {
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pin.conf().write(|w| {
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w.dir().output();
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w.input().disconnect();
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w.pull().disabled();
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w.drive().s0s1();
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w.sense().disabled();
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w
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});
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Self { pin }
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}
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}
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impl<T: Pin> Drop for Output<T> {
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fn drop(&mut self) {
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self.pin.conf().reset();
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}
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}
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impl<T: Pin> OutputPin for Output<T> {
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type Error = Infallible;
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/// Set the output as high.
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fn set_high(&mut self) -> Result<(), Self::Error> {
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unsafe {
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self.pin
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.block()
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.outset
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.write(|w| w.bits(1u32 << self.pin.pin()));
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}
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Ok(())
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}
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/// Set the output as low.
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fn set_low(&mut self) -> Result<(), Self::Error> {
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unsafe {
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self.pin
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.block()
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.outclr
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.write(|w| w.bits(1u32 << self.pin.pin()));
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}
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Ok(())
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}
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}
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impl<T: Pin> StatefulOutputPin for Output<T> {
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/// Is the output pin set as high?
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fn is_set_high(&self) -> Result<bool, Self::Error> {
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self.is_set_low().map(|v| !v)
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}
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/// Is the output pin set as low?
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fn is_set_low(&self) -> Result<bool, Self::Error> {
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Ok(self.pin.block().out.read().bits() & (1 << self.pin.pin()) == 0)
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}
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}
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pub(crate) mod sealed {
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use super::*;
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pub trait Pin {
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fn pin_port(&self) -> u8;
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#[inline]
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fn _pin(&self) -> u8 {
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#[cfg(any(feature = "52833", feature = "52840"))]
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{
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self.pin_port() % 32
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}
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#[cfg(not(any(feature = "52833", feature = "52840")))]
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{
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self.pin_port()
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}
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}
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fn block(&self) -> &gpio::RegisterBlock {
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unsafe {
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match self.pin_port() / 32 {
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0 => &*pac::P0::ptr(),
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#[cfg(any(feature = "52833", feature = "52840"))]
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1 => &*pac::P1::ptr(),
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_ => unreachable_unchecked(),
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}
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}
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}
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fn conf(&self) -> &gpio::PIN_CNF {
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&self.block().pin_cnf[self._pin() as usize]
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}
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/// Set the output as high.
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fn set_high(&self) {
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unsafe {
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self.block().outset.write(|w| w.bits(1u32 << self._pin()));
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}
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}
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/// Set the output as low.
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fn set_low(&self) {
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unsafe {
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self.block().outclr.write(|w| w.bits(1u32 << self._pin()));
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}
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}
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}
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}
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pub trait Pin: sealed::Pin + Sized {
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#[inline]
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fn pin(&self) -> u8 {
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self._pin()
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}
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#[inline]
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fn port(&self) -> Port {
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match self.pin_port() / 32 {
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1 => Port::Port0,
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#[cfg(any(feature = "52833", feature = "52840"))]
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1 => Port::Port1,
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_ => unsafe { unreachable_unchecked() },
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}
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}
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#[inline]
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fn psel_bits(&self) -> u32 {
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self.pin_port() as u32
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}
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fn degrade(self) -> AnyPin {
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AnyPin {
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pin_port: self.pin_port(),
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}
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}
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}
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pub struct AnyPin {
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pin_port: u8,
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}
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impl AnyPin {
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pub unsafe fn from_psel_bits(psel_bits: u32) -> Self {
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Self {
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pin_port: psel_bits as u8,
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}
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}
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}
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impl Pin for AnyPin {}
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impl sealed::Pin for AnyPin {
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fn pin_port(&self) -> u8 {
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self.pin_port
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}
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}
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macro_rules! make_impl {
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($type:ident, $port_num:expr, $pin_num:expr) => {
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impl Pin for peripherals::$type {}
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impl sealed::Pin for peripherals::$type {
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fn pin_port(&self) -> u8 {
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$port_num * 32 + $pin_num
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}
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}
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};
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}
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make_impl!(P0_00, 0, 0);
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make_impl!(P0_01, 0, 1);
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make_impl!(P0_02, 0, 2);
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make_impl!(P0_03, 0, 3);
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make_impl!(P0_04, 0, 4);
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make_impl!(P0_05, 0, 5);
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make_impl!(P0_06, 0, 6);
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make_impl!(P0_07, 0, 7);
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make_impl!(P0_08, 0, 8);
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make_impl!(P0_09, 0, 9);
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make_impl!(P0_10, 0, 10);
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make_impl!(P0_11, 0, 11);
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make_impl!(P0_12, 0, 12);
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make_impl!(P0_13, 0, 13);
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make_impl!(P0_14, 0, 14);
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make_impl!(P0_15, 0, 15);
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make_impl!(P0_16, 0, 16);
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make_impl!(P0_17, 0, 17);
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make_impl!(P0_18, 0, 18);
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make_impl!(P0_19, 0, 19);
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make_impl!(P0_20, 0, 20);
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make_impl!(P0_21, 0, 21);
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make_impl!(P0_22, 0, 22);
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make_impl!(P0_23, 0, 23);
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make_impl!(P0_24, 0, 24);
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make_impl!(P0_25, 0, 25);
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make_impl!(P0_26, 0, 26);
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make_impl!(P0_27, 0, 27);
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make_impl!(P0_28, 0, 28);
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make_impl!(P0_29, 0, 29);
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make_impl!(P0_30, 0, 30);
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make_impl!(P0_31, 0, 31);
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#[cfg(any(feature = "52833", feature = "52840"))]
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mod _p1 {
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use super::*;
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make_impl!(P1_00, 1, 0);
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make_impl!(P1_01, 1, 1);
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make_impl!(P1_02, 1, 2);
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make_impl!(P1_03, 1, 3);
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make_impl!(P1_04, 1, 4);
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make_impl!(P1_05, 1, 5);
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make_impl!(P1_06, 1, 6);
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make_impl!(P1_07, 1, 7);
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make_impl!(P1_08, 1, 8);
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make_impl!(P1_09, 1, 9);
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make_impl!(P1_10, 1, 10);
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make_impl!(P1_11, 1, 11);
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make_impl!(P1_12, 1, 12);
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make_impl!(P1_13, 1, 13);
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make_impl!(P1_14, 1, 14);
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make_impl!(P1_15, 1, 15);
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}
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@ -94,8 +94,10 @@ pub(crate) fn slice_in_ram_or<T>(slice: &[u8], err: T) -> Result<(), T> {
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pub(crate) mod fmt;
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pub mod buffered_uarte;
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pub mod gpio;
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pub mod gpiote;
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pub mod interrupt;
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pub mod peripherals;
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#[cfg(feature = "52840")]
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pub mod qspi;
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pub mod rtc;
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144
embassy-nrf/src/peripherals.rs
Normal file
144
embassy-nrf/src/peripherals.rs
Normal file
@ -0,0 +1,144 @@
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use embassy::util::PeripheralBorrow;
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macro_rules! peripherals {
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($($(#[$cfg:meta])? $name:ident: $type:ident),*$(,)?) => {
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$(
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$(#[$cfg])?
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pub struct $type { _private: () }
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$(#[$cfg])?
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impl PeripheralBorrow for $type {
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type Target = $type;
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unsafe fn unborrow(self) -> $type {
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self
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}
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}
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$(#[$cfg])?
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impl PeripheralBorrow for &mut $type {
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type Target = $type;
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unsafe fn unborrow(self) -> $type {
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::core::ptr::read(self)
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}
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}
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)*
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pub struct Peripherals {
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$(
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$(#[$cfg])?
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pub $name: $type,
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)*
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}
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impl Peripherals {
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pub unsafe fn steal() -> Self {
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Self {
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$(
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$(#[$cfg])?
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$name: $type { _private: () },
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)*
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}
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}
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}
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};
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}
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peripherals! {
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// RTC
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rtc0: RTC0,
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rtc1: RTC1,
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#[cfg(any(feature = "52832", feature = "52833", feature = "52840"))]
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rtc2: RTC2,
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// QSPI
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#[cfg(feature = "52840")]
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qspi: QSPI,
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// UARTE
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uarte0: UARTE0,
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#[cfg(any(feature = "52833", feature = "52840", feature = "9160"))]
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uarte1: UARTE1,
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// SPIM
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// TODO this is actually shared with SPI, SPIM, SPIS, TWI, TWIS, TWIS.
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// When they're all implemented, they should be only one peripheral here.
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spim0: SPIM0,
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#[cfg(any(feature = "52832", feature = "52833", feature = "52840"))]
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spim1: SPIM1,
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#[cfg(any(feature = "52832", feature = "52833", feature = "52840"))]
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spim2: SPIM2,
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#[cfg(any(feature = "52833", feature = "52840"))]
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spim3: SPIM3,
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// GPIOTE
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gpiote: GPIOTE,
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// GPIO port 0
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p0_00: P0_00,
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p0_01: P0_01,
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p0_02: P0_02,
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p0_03: P0_03,
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p0_04: P0_04,
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p0_05: P0_05,
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p0_06: P0_06,
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p0_07: P0_07,
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p0_08: P0_08,
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p0_09: P0_09,
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p0_10: P0_10,
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p0_11: P0_11,
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p0_12: P0_12,
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p0_13: P0_13,
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p0_14: P0_14,
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p0_15: P0_15,
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p0_16: P0_16,
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p0_17: P0_17,
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p0_18: P0_18,
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p0_19: P0_19,
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p0_20: P0_20,
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p0_21: P0_21,
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p0_22: P0_22,
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p0_23: P0_23,
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p0_24: P0_24,
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p0_25: P0_25,
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p0_26: P0_26,
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p0_27: P0_27,
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p0_28: P0_28,
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p0_29: P0_29,
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p0_30: P0_30,
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p0_31: P0_31,
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// GPIO port 1
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#[cfg(any(feature = "52833", feature = "52840"))]
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p1_00: P1_00,
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#[cfg(any(feature = "52833", feature = "52840"))]
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p1_01: P1_01,
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#[cfg(any(feature = "52833", feature = "52840"))]
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p1_02: P1_02,
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#[cfg(any(feature = "52833", feature = "52840"))]
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p1_03: P1_03,
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#[cfg(any(feature = "52833", feature = "52840"))]
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p1_04: P1_04,
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#[cfg(any(feature = "52833", feature = "52840"))]
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p1_05: P1_05,
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#[cfg(any(feature = "52833", feature = "52840"))]
|
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p1_06: P1_06,
|
||||
#[cfg(any(feature = "52833", feature = "52840"))]
|
||||
p1_07: P1_07,
|
||||
#[cfg(any(feature = "52833", feature = "52840"))]
|
||||
p1_08: P1_08,
|
||||
#[cfg(any(feature = "52833", feature = "52840"))]
|
||||
p1_09: P1_09,
|
||||
#[cfg(any(feature = "52833", feature = "52840"))]
|
||||
p1_10: P1_10,
|
||||
#[cfg(any(feature = "52833", feature = "52840"))]
|
||||
p1_11: P1_11,
|
||||
#[cfg(any(feature = "52833", feature = "52840"))]
|
||||
p1_12: P1_12,
|
||||
#[cfg(any(feature = "52833", feature = "52840"))]
|
||||
p1_13: P1_13,
|
||||
#[cfg(any(feature = "52833", feature = "52840"))]
|
||||
p1_14: P1_14,
|
||||
#[cfg(any(feature = "52833", feature = "52840"))]
|
||||
p1_15: P1_15,
|
||||
}
|
@ -1,19 +1,20 @@
|
||||
use core::future::Future;
|
||||
use core::marker::PhantomData;
|
||||
use core::pin::Pin;
|
||||
use core::sync::atomic::{compiler_fence, Ordering};
|
||||
use core::task::Poll;
|
||||
use embassy::traits;
|
||||
use embassy::util::WakerRegistration;
|
||||
use embassy::util::{PeripheralBorrow, WakerRegistration};
|
||||
use embassy_extras::peripheral::{PeripheralMutex, PeripheralState};
|
||||
use futures::future::poll_fn;
|
||||
use traits::spi::FullDuplex;
|
||||
|
||||
use crate::gpio::Pin as GpioPin;
|
||||
use crate::interrupt::{self, Interrupt};
|
||||
use crate::{pac, slice_in_ram_or};
|
||||
use crate::{pac, peripherals, slice_in_ram_or};
|
||||
|
||||
pub use crate::hal::spim::{
|
||||
Frequency, Mode, Phase, Pins, Polarity, MODE_0, MODE_1, MODE_2, MODE_3,
|
||||
};
|
||||
pub use embedded_hal::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3};
|
||||
pub use pac::spim0::frequency::FREQUENCY_A as Frequency;
|
||||
|
||||
#[derive(Debug, Clone, Copy, PartialEq, Eq)]
|
||||
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
|
||||
@ -30,41 +31,63 @@ struct State<T: Instance> {
|
||||
waker: WakerRegistration,
|
||||
}
|
||||
|
||||
pub struct Spim<T: Instance> {
|
||||
pub struct Spim<'d, T: Instance> {
|
||||
inner: PeripheralMutex<State<T>>,
|
||||
phantom: PhantomData<&'d mut T>,
|
||||
}
|
||||
|
||||
pub struct Config {
|
||||
pub pins: Pins,
|
||||
pub frequency: Frequency,
|
||||
pub mode: Mode,
|
||||
pub orc: u8,
|
||||
}
|
||||
|
||||
impl<T: Instance> Spim<T> {
|
||||
pub fn new(mut spim: T, irq: T::Interrupt, config: Config) -> Self {
|
||||
impl<'d, T: Instance> Spim<'d, T> {
|
||||
pub fn new(
|
||||
spim: impl PeripheralBorrow<Target = T> + 'd,
|
||||
irq: impl PeripheralBorrow<Target = T::Interrupt> + 'd,
|
||||
sck: impl PeripheralBorrow<Target = impl GpioPin> + 'd,
|
||||
miso: impl PeripheralBorrow<Target = impl GpioPin> + 'd,
|
||||
mosi: impl PeripheralBorrow<Target = impl GpioPin> + 'd,
|
||||
config: Config,
|
||||
) -> Self {
|
||||
let mut spim = unsafe { spim.unborrow() };
|
||||
let irq = unsafe { irq.unborrow() };
|
||||
let sck = unsafe { sck.unborrow() };
|
||||
let miso = unsafe { miso.unborrow() };
|
||||
let mosi = unsafe { mosi.unborrow() };
|
||||
|
||||
let r = spim.regs();
|
||||
|
||||
// Configure pins
|
||||
sck.conf().write(|w| w.dir().output());
|
||||
mosi.conf().write(|w| w.dir().output());
|
||||
miso.conf().write(|w| w.input().connect());
|
||||
|
||||
match config.mode.polarity {
|
||||
Polarity::IdleHigh => {
|
||||
sck.set_high();
|
||||
mosi.set_high();
|
||||
}
|
||||
Polarity::IdleLow => {
|
||||
sck.set_low();
|
||||
mosi.set_low();
|
||||
}
|
||||
}
|
||||
|
||||
// Select pins.
|
||||
r.psel.sck.write(|w| {
|
||||
unsafe { w.bits(config.pins.sck.psel_bits()) };
|
||||
unsafe { w.bits(sck.psel_bits()) };
|
||||
w.connect().connected()
|
||||
});
|
||||
|
||||
match config.pins.mosi {
|
||||
Some(mosi) => r.psel.mosi.write(|w| {
|
||||
r.psel.mosi.write(|w| {
|
||||
unsafe { w.bits(mosi.psel_bits()) };
|
||||
w.connect().connected()
|
||||
}),
|
||||
None => r.psel.mosi.write(|w| w.connect().disconnected()),
|
||||
}
|
||||
match config.pins.miso {
|
||||
Some(miso) => r.psel.miso.write(|w| {
|
||||
});
|
||||
r.psel.miso.write(|w| {
|
||||
unsafe { w.bits(miso.psel_bits()) };
|
||||
w.connect().connected()
|
||||
}),
|
||||
None => r.psel.miso.write(|w| w.connect().disconnected()),
|
||||
}
|
||||
});
|
||||
|
||||
// Enable SPIM instance.
|
||||
r.enable.write(|w| w.enable().enabled());
|
||||
@ -114,6 +137,7 @@ impl<T: Instance> Spim<T> {
|
||||
},
|
||||
irq,
|
||||
),
|
||||
phantom: PhantomData,
|
||||
}
|
||||
}
|
||||
|
||||
@ -122,7 +146,7 @@ impl<T: Instance> Spim<T> {
|
||||
}
|
||||
}
|
||||
|
||||
impl<T: Instance> FullDuplex<u8> for Spim<T> {
|
||||
impl<'d, T: Instance> FullDuplex<u8> for Spim<'d, T> {
|
||||
type Error = Error;
|
||||
|
||||
#[rustfmt::skip]
|
||||
@ -222,19 +246,19 @@ mod sealed {
|
||||
}
|
||||
}
|
||||
|
||||
pub trait Instance: sealed::Instance {
|
||||
pub trait Instance: sealed::Instance + 'static {
|
||||
type Interrupt: Interrupt;
|
||||
}
|
||||
|
||||
macro_rules! make_impl {
|
||||
($SPIMx:ident, $IRQ:ident) => {
|
||||
impl sealed::Instance for pac::$SPIMx {
|
||||
($type:ident, $irq:ident) => {
|
||||
impl sealed::Instance for peripherals::$type {
|
||||
fn regs(&mut self) -> &pac::spim0::RegisterBlock {
|
||||
self
|
||||
unsafe { &*pac::$type::ptr() }
|
||||
}
|
||||
}
|
||||
impl Instance for pac::$SPIMx {
|
||||
type Interrupt = interrupt::$IRQ;
|
||||
impl Instance for peripherals::$type {
|
||||
type Interrupt = interrupt::$irq;
|
||||
}
|
||||
};
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user