stm32: remove paste and use refcount statics
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@ -56,7 +56,7 @@ pub trait Instance: sealed::Instance + crate::Peripheral<P = Self> + crate::rcc:
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pub trait AdcPin<T: Instance>: sealed::AdcPin<T> {}
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pub trait InternalChannel<T>: sealed::InternalChannel<T> {}
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#[cfg(not(any(stm32h7, adc_f3)))]
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#[cfg(not(any(stm32h7, adc_f3, adc_v4)))]
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foreach_peripheral!(
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(adc, $inst:ident) => {
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impl crate::adc::sealed::Instance for peripherals::$inst {
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@ -77,9 +77,10 @@ foreach_peripheral!(
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};
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);
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#[cfg(any(stm32h7, adc_f3))]
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#[cfg(any(stm32h7, adc_f3, adc_v4))]
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foreach_peripheral!(
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(adc, ADC3) => {
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#[cfg(not(any(stm32g4x1, stm32g4x2, stm32g4x3, stm32g4x4)))]
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impl crate::adc::sealed::Instance for peripherals::ADC3 {
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fn regs() -> crate::pac::adc::Adc {
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crate::pac::ADC3
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@ -99,6 +100,7 @@ foreach_peripheral!(
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}
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}
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#[cfg(not(any(stm32g4x1, stm32g4x2, stm32g4x3, stm32g4x4)))]
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impl crate::adc::Instance for peripherals::ADC3 {}
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};
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(adc, ADC4) => {
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@ -1,10 +1,7 @@
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use core::sync::atomic::{AtomicU8, Ordering};
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use embedded_hal_02::blocking::delay::DelayUs;
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#[allow(unused)]
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use pac::adc::vals::{Adcaldif, Boost, Difsel, Exten, Pcsel};
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use pac::adccommon::vals::Presc;
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use paste::paste;
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use super::{Adc, AdcPin, Instance, InternalChannel, Resolution, SampleTime};
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use crate::time::Hertz;
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@ -59,77 +56,6 @@ impl<T: Instance> super::sealed::InternalChannel<T> for Vbat {
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}
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}
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static ADC12_ENABLE_COUNTER: AtomicU8 = AtomicU8::new(0);
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#[cfg(any(stm32g4x3, stm32g4x4))]
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static ADC345_ENABLE_COUNTER: AtomicU8 = AtomicU8::new(0);
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macro_rules! rcc_peripheral {
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($adc_name:ident, $freqs:ident, $ahb:ident, $reg:ident $(, $counter:ident )? ) => {
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impl crate::rcc::sealed::RccPeripheral for crate::peripherals::$adc_name {
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fn frequency() -> crate::time::Hertz {
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critical_section::with(|_| {
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match unsafe { crate::rcc::get_freqs() }.$freqs {
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Some(ck) => ck,
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None => panic!("Invalid ADC clock configuration, AdcClockSource was likely not properly configured.")
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}
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})
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}
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fn enable() {
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critical_section::with(|_| {
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paste!{crate::pac::RCC.[< $ahb enr >]().modify(|w| w.[< set_ $reg en >](true))}
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});
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$ ( $counter.fetch_add(1, Ordering::SeqCst); )?
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}
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fn disable() {
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$ ( if $counter.load(Ordering::SeqCst) == 1 )? {
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critical_section::with(|_| {
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paste!{crate::pac::RCC.[< $ahb enr >]().modify(|w| w.[< set_ $reg en >](false))}
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})
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}
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$ ( $counter.fetch_sub(1, Ordering::SeqCst); )?
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}
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fn reset() {
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$ ( if $counter.load(Ordering::SeqCst) == 1 )? {
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critical_section::with(|_| {
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paste!{crate::pac::RCC.[< $ahb rstr >]().modify(|w| w.[< set_ $reg rst >](true))}
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paste!{crate::pac::RCC.[< $ahb rstr >]().modify(|w| w.[< set_ $reg rst >](false))}
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});
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}
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}
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}
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impl crate::rcc::RccPeripheral for crate::peripherals::$adc_name {}
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};
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}
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#[cfg(stm32g4)]
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foreach_peripheral!(
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(adc, ADC1) => { rcc_peripheral!(ADC1, adc, ahb2, adc12, ADC12_ENABLE_COUNTER); };
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(adc, ADC2) => { rcc_peripheral!(ADC2, adc, ahb2, adc12, ADC12_ENABLE_COUNTER); };
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);
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#[cfg(stm32g4x1)]
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foreach_peripheral!(
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(adc, ADC3) => { rcc_peripheral!(ADC3, adc34, ahb2, adc345); };
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);
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#[cfg(any(stm32g4x3, stm32g4x4))]
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foreach_peripheral!(
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(adc, ADC3) => { rcc_peripheral!(ADC3, adc34, ahb2, adc345, ADC345_ENABLE_COUNTER); };
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(adc, ADC4) => { rcc_peripheral!(ADC4, adc34, ahb2, adc345, ADC345_ENABLE_COUNTER); };
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(adc, ADC5) => { rcc_peripheral!(ADC5, adc34, ahb2, adc345, ADC345_ENABLE_COUNTER); };
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);
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#[cfg(stm32h7)]
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foreach_peripheral!(
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(adc, ADC1) => { rcc_peripheral!(ADC1, adc, ahb1, adc12, ADC12_ENABLE_COUNTER); };
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(adc, ADC2) => { rcc_peripheral!(ADC2, adc, ahb1, adc12, ADC12_ENABLE_COUNTER); };
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(adc, ADC3) => { rcc_peripheral!(ADC3, adc, ahb4, adc3); };
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);
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// NOTE (unused): The prescaler enum closely copies the hardware capabilities,
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// but high prescaling doesn't make a lot of sense in the current implementation and is ommited.
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#[allow(unused)]
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