stm32/otg: change some info logs to trace.
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47305c2bf2
commit
ffeb40ff43
@ -648,7 +648,7 @@ impl<'d, T: Instance> Bus<'d, T> {
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let r = T::regs();
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let r = T::regs();
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let core_id = r.cid().read().0;
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let core_id = r.cid().read().0;
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info!("Core id {:08x}", core_id);
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trace!("Core id {:08x}", core_id);
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// Wait for AHB ready.
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// Wait for AHB ready.
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while !r.grstctl().read().ahbidl() {}
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while !r.grstctl().read().ahbidl() {}
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@ -1214,7 +1214,7 @@ impl<'d, T: Instance> embassy_usb_driver::EndpointIn for Endpoint<'d, T, In> {
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let diepctl = r.diepctl(index).read();
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let diepctl = r.diepctl(index).read();
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let dtxfsts = r.dtxfsts(index).read();
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let dtxfsts = r.dtxfsts(index).read();
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info!("diepctl {:08x} ftxfsts {:08x}", diepctl.0, dtxfsts.0);
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trace!("diepctl {:08x} ftxfsts {:08x}", diepctl.0, dtxfsts.0);
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if !diepctl.usbaep() {
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if !diepctl.usbaep() {
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trace!("write ep={:?} wait for prev: error disabled", self.info.addr);
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trace!("write ep={:?} wait for prev: error disabled", self.info.addr);
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Poll::Ready(Err(EndpointError::Disabled))
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Poll::Ready(Err(EndpointError::Disabled))
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