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h7-sai4only-fix
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Author SHA1 Message Date
Ilya Epifanov
62d6bb6c8a added sampling frequency setting to adc capture methods on rp2040 2023-10-09 10:53:29 +02:00
Dario Nieuwenhuis
c3ef98a73d Merge pull request #2026 from embassy-rs/stm32-pac-pll-enums 
stm32/rcc: use PLL enums from PAC.
 2023-10-09 00:58:22 +00:00
Dario Nieuwenhuis
6186fe0807 stm32/rcc: use PLL enums from PAC. 2023-10-09 02:48:22 +02:00
xoviat
c4cff0b79b Merge pull request #2025 from xoviat/update-pac 
stm32: update metapac
 2023-10-08 23:35:14 +00:00
xoviat
2e5ab7981e stm32: update metapac 2023-10-08 18:27:36 -05:00
Dario Nieuwenhuis
9d311121f2 Merge pull request #2022 from HelloWorldTeraByte/impl-pwm-trait 
Implemented Pwm trait from embedded_hal for simple and complementary pwm
 2023-10-07 00:35:05 +00:00
Dario Nieuwenhuis
25c3754cd2 Merge pull request #2019 from embassy-rs/net-hostname 
net: add support for dhcp hostname option.
 2023-10-07 00:17:35 +00:00
Dario Nieuwenhuis
85c6f23dcb Merge pull request #2018 from jamesmunns/add-derives 
Add some uncontroversial derives to Error types
 2023-10-07 00:03:10 +00:00
Dario Nieuwenhuis
9c6a2d9cbd Merge pull request #1880 from phire/rp_bootsel 
rp2040: BOOTSEL button support
 2023-10-06 23:56:00 +00:00
Dario Nieuwenhuis
b67b179933 rp/bootsel: add test. 2023-10-07 01:47:25 +02:00
Dario Nieuwenhuis
d4ed8e5779 rp/bootsel: change it to a method on the peripheral. 2023-10-07 01:47:20 +02:00
Scott Mansell
3e054a6f0d rp2040: implement BOOTSEL button support 2023-10-07 01:39:29 +02:00
Scott Mansell
c6d53e7bce rp2040: move in_ram helper outside of Flash's impl 
Allow it to be called from other modules.
 2023-10-07 01:39:29 +02:00
Dario Nieuwenhuis
3bf8e4de5f Merge pull request #2015 from willglynn/stm32u5_faster_clocks 
stm32: u5: implement >55 MHz clock speeds
 2023-10-06 23:38:15 +00:00
Dario Nieuwenhuis
9090a78df4 ci: set target dir if not specified. 2023-10-07 01:34:17 +02:00
James Munns
022d870d61 Add missing derive 2023-10-07 01:33:43 +02:00
Dario Nieuwenhuis
534eb960e9 net: add support for dhcp hostname option. 2023-10-07 01:33:21 +02:00
Dario Nieuwenhuis
7a2b8481f7 Merge pull request #2021 from embassy-rs/stm32-mco 
stm32: add MCO for all chips
 2023-10-06 23:31:32 +00:00
randi
710874021a Implemented Pwm trait for complementary pwm from embedded_hal 2023-10-07 12:22:31 +13:00
Dario Nieuwenhuis
3a8e0d4a27 stm32: implement MCO for all chips. 2023-10-07 01:15:24 +02:00
randi
b217d147de Implemented Pwm trait from embedded_hal 2023-10-07 11:57:19 +13:00
shakencodes
68c4820dde Add MCO support for stm32wl family 2023-10-06 14:37:36 -07:00
Dario Nieuwenhuis
f30fc949ff Merge pull request #2012 from mattico/h7-rtc 
H7: support LSE, LSI, LSEBYP, and RTCCLKSEL
 2023-10-06 21:27:04 +00:00
Dario Nieuwenhuis
75c1a9a3aa disable flaky f2 eth test 2023-10-06 23:25:39 +02:00
Matt Ickstadt
4075ac84e1 h7: enable rtc test 2023-10-06 14:12:57 -05:00
Matt Ickstadt
f01609036f h7: implement RTC and LSE clock configuration 2023-10-06 13:28:30 -05:00
James Munns
930b8f3495 Add some uncontroversial derives to Error types 2023-10-06 17:45:35 +02:00
Will Glynn
38e7709a24 stm32: u5: implement >55 MHz clock speeds 
This commit allows STM32U5 devices to operate at 160 MHz.

On STM32U5, MSIS can run at 48 MHz and HSE can reach 50 MHz. Faster
clocks require using PLL1's R output, though PLL1 can serve other
functions besides using the R output for the system clock. This commit
extracts a public `PllConfig` struct, primarily to place associated
constructors on that type, but also with an eye towards enabling the P
and Q outputs in a later commit.

STM32U5 PLLs have various frequency requirements on each stage: after
the `m` prescaler, after the `n` multiplier, and after the `r` divider.
This commit implements the associated checks as assertions.

This commit fixes clock calculation and PLL register configuration
errors in PLL initialization.

STM32U5 has a PWR peripheral which can be configured to push Vcore into
different voltage ranges. System clocks exceeding 55 MHz require range
2, and system clocks exceeding 110 MHz require range 1. This commit
adds `voltage_range` to `Config` and configures PWR as directed.

The voltage range implies different performance limits on various clock
signals, including inside a PLL. This commit implements voltage range
<-> frequency range checks as assertions, and extracts the
otherwise-repeated MSIS, HSI16, and HSE initialization into private
methods on `Config`.

STM32U5 frequencies above 55 MHz require using the PWR EPOD booster.
The EPOD booster requires configuring a second `m` term for PLL1,
`mboost`, such that it falls in a particular range. (Recall that >50
MHz cannot be reached without PLL1, so there is no scenario where EPOD
is needed but PLL1 is not.) This commit configures and enables the EPOD
booster automatically as required.
 2023-10-05 22:13:27 -05:00
Ulf Lilleengen
65ed19aae2 Merge pull request #2014 from bugadani/udp 
Reexport IpListenEndpoint for TCP
 2023-10-05 16:13:10 +00:00
Dániel Buga
be9c05fbc9 Reexport IpListenEndpoint for TCP 2023-10-05 17:02:25 +02:00
xoviat
42176b1a3a Merge pull request #2013 from xoviat/opamp 
stm32: update metapac and fix opamp ch
 2023-10-04 21:20:42 +00:00
xoviat
e1a0635ca3 stm32: update metapac and fix opamp ch 2023-10-04 16:15:08 -05:00
xoviat
b887b7516e Merge pull request #2011 from glaeqen/input-pin 
stm32/gpio: Implement `eh1::digital::InputPin` for `OutputOpenDrain`
 2023-10-04 17:36:26 +00:00
Gabriel Górski
c6513f93fe stm32/gpio: Implement eh1::digital::InputPin for OutputOpenDrain 
Pins in open-drain mode are outputs and inputs simultaneously.
 2023-10-04 18:20:25 +02:00
Dario Nieuwenhuis
59f706ee2f Merge pull request #2006 from embassy-rs/update-eio 
update embedded-io, embedded-nal-async.
 2023-10-03 22:27:06 +00:00
Dario Nieuwenhuis
ba7d74ac16 tests/stm32: increase tickrate for better precision. 2023-10-04 00:17:33 +02:00
Dario Nieuwenhuis
0324cee0ca update embedded-io, embedded-nal-async. 2023-10-04 00:10:55 +02:00
xoviat
8ac5c1a963 Merge pull request #1973 from xoviat/opamp 
stm32: add opamp
 2023-10-03 22:01:46 +00:00
xoviat
e7ab044935 ci: remove wpan tests again 2023-10-03 16:59:18 -05:00
xoviat
0c4cddfafb Merge branch 'main' of github.com:embassy-rs/embassy into opamp 2023-10-03 16:44:44 -05:00
xoviat
e561e673c2 stm32: add opamp mod and update pac 2023-10-03 16:34:13 -05:00
xoviat
09dfcd6b66 Merge pull request #2008 from xoviat/wpan 
wpan: re-enable HIL tests
 2023-10-03 21:02:48 +00:00
xoviat
bb8a1b7f1f wpan: re-enable HIL tests 2023-10-03 15:53:22 -05:00
Dario Nieuwenhuis
b012a67df7 Merge pull request #2007 from embassy-rs/unverbose 
Remove a few ultra-verbose logs.
 2023-10-03 20:28:44 +00:00
Dario Nieuwenhuis
40f30fa4cd Remove a few ultra-verbose logs. 
They're heavily spamming logs for HIL tests, and I don't believe
they're valuable now that the thing they helped debug in their young
age is now solid and mature.
 2023-10-03 22:22:16 +02:00
Dario Nieuwenhuis
f197aa9419 Merge pull request #2005 from embassy-rs/minor-doc-improvs 
docs: minor doc improvements and cleanup
 2023-10-03 19:37:39 +00:00
Ulf Lilleengen
80a740bc72 docs: minor doc improvements and cleanup 2023-10-03 21:35:31 +02:00
Dario Nieuwenhuis
ad524373ed Merge pull request #1926 from m5p3nc3r/async_dtr 
Add a signal for when the CDC control state changes
 2023-10-03 02:13:12 +00:00
Dario Nieuwenhuis
9badf740d8 Merge pull request #2001 from embassy-rs/stm32-more-hil 
stm32/hil: add f2, f3, f7, l49
 2023-10-03 02:07:00 +00:00
Dario Nieuwenhuis
6e901846df Merge pull request #1995 from JuliDi/quadspi 
[STM32] QUADSPI support bank 2
 2023-10-03 01:55:27 +00:00