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Author SHA1 Message Date
Dario Nieuwenhuis
f55a303814 net: fix build 2021-05-28 23:10:15 +02:00
Dario Nieuwenhuis
4ebc113852 Merge remote-tracking branch 'embassy-net/main' 2021-05-28 23:07:27 +02:00
Dario Nieuwenhuis
b4c11695cf Update smoltcp 2021-05-28 22:34:07 +02:00
Dario Nieuwenhuis
6898ec7318
Merge pull request #210 from lulf/spiv2-fix 
Refactor SPI and fix write bug
 2021-05-27 23:43:52 +02:00
Ulf Lilleengen
edec5833b3 Refactor SPI and fix write bug 
* SPI write v2 was hanging in write due to an infinite loop
* SPI word write was not followed by a read back

The u8 and u16 write/read logic have been refactored into write_word and
read_word.
 2021-05-27 23:05:42 +02:00
Dario Nieuwenhuis
c4ea7427fa Update stm32-data 2021-05-27 13:46:46 +02:00
Dario Nieuwenhuis
3f6f1d99bb
Merge pull request #207 from lulf/clock-init 
Enable clock by default for stm32l0
 2021-05-27 13:36:14 +02:00
Dario Nieuwenhuis
1d3e685821
Merge pull request #209 from lulf/handle-pin-0 
Handle case where pin value could be 0
 2021-05-27 13:29:16 +02:00
Ulf Lilleengen
d4dbeb6933 Handle case where pin value could be 0 
In the case where GPIO mapping could look like this:

PA5:
  SPI1_SCK: 0

The pin would not get any generated impl because the if expression would evaluate to false. Fix this for all cases in gen.py by comparing against None
                                   ~
 2021-05-27 13:25:06 +02:00
Ulf Lilleengen
3669eba561 Use builder 2021-05-27 10:01:40 +02:00
Ulf Lilleengen
a41a812345 Move clocks to rcc mod 2021-05-27 09:50:11 +02:00
Dario Nieuwenhuis
f553a102d3
Merge pull request #205 from bobmcwhirter/i2c_v1 
I2c v1
 2021-05-27 03:10:37 +02:00
Dario Nieuwenhuis
05a2102ecb
Merge pull request #202 from bobmcwhirter/i2c 
I2c
 2021-05-27 03:07:40 +02:00
Dario Nieuwenhuis
da38de309b nrf/qspi: set correct config for flash chip in the nrf52840dk 2021-05-27 00:42:46 +02:00
Dario Nieuwenhuis
3bd36dce76 nrf/qspi: wait MORE for DPM enter. 2021-05-27 00:42:29 +02:00
Dario Nieuwenhuis
b515170e0a
Merge pull request #208 from embassy-rs/deconfigure-pins 
nRF lowpower improvements
 2021-05-26 23:52:15 +02:00
Dario Nieuwenhuis
565c606ff8 nrf/qspi: add lowpower example 2021-05-26 23:28:40 +02:00
Dario Nieuwenhuis
de703eb605 nrf/qspi: proper lowpower drop, supporting DPM. 2021-05-26 23:26:07 +02:00
Ulf Lilleengen
6eaf224fec No more systemclock 2021-05-26 21:46:57 +02:00
Ulf Lilleengen
bfa999a2e0 Assume tim2 in macro and remove clock setup in chip specific rcc init 
Add temporary start_tim2() fn to Clock to assist macro in starting
embassy clock
 2021-05-26 21:42:07 +02:00
Ulf Lilleengen
aaab7d87a5 Revert "Update init use" 
This reverts commit a06664bd3e.
 2021-05-26 20:42:11 +02:00
Ulf Lilleengen
a06664bd3e Update init use 2021-05-26 20:12:54 +02:00
Dario Nieuwenhuis
42abeca493 nrf/spim: disable and deconfigure pins on drop. 2021-05-26 20:11:23 +02:00
Dario Nieuwenhuis
39c420733f nrf/uarte: deconfigure pins on drop 2021-05-26 20:11:23 +02:00
Dario Nieuwenhuis
11f9ad6867 nrf/twim: add examples 2021-05-26 20:11:23 +02:00
Dario Nieuwenhuis
8dfb6dff86 nrf/twim: make pullup configurable, do not enable it by default. 2021-05-26 20:11:23 +02:00
Dario Nieuwenhuis
b449f6de9d nrf/twim: deconfigure pins on drop 2021-05-26 18:23:10 +02:00
Ulf Lilleengen
f960f5b105 Rework 2021-05-26 13:55:25 +02:00
Ulf Lilleengen
9743c59ad4 Simplify 2021-05-26 13:29:11 +02:00
Ulf Lilleengen
9a21d74273 Remove debug code 2021-05-26 13:08:55 +02:00
Ulf Lilleengen
ea67940743 Refactor 2021-05-26 13:08:14 +02:00
Ulf Lilleengen
c501b162fc Enable clock by default for stm32l0 
Modify init function to return a Clock instance defined by a per-chip
SystemClock type and use this in macro setup

A proof of concept implementation for STM32 L0 chips.

This allows using embassy::main macros for STM32 devices that have the
clock setup logic.
 2021-05-26 12:33:07 +02:00
Bob McWhirter
a9ec941dca i2c v1 2021-05-25 14:47:07 -04:00
Bob McWhirter
aed8283cd5 Finalize i2c v2. 2021-05-25 10:02:40 -04:00
Dario Nieuwenhuis
a126e17fb2
Merge pull request #204 from lulf/enable-stm32-macro 
Enable stm32 macro
 2021-05-25 15:12:45 +02:00
Ulf Lilleengen
ef254647f7 Add stm32l0 2021-05-25 13:32:10 +02:00
Ulf Lilleengen
1c10e746b6 Re-adds embassy macros for stm32 
* Hook RCC config into chip config and use chip-specific RCC init
  function
* RTC/clock setup is ignored for now
 2021-05-25 13:30:42 +02:00
Dario Nieuwenhuis
4b98361967
Merge pull request #201 from thalesfragoso/timers-rtc 
Timers clock for stm32
 2021-05-24 17:38:20 +02:00
Thales Fragoso
9c5d4d9f8a STM32 Clock: Use atomic-polyfill 2021-05-23 17:22:07 -03:00
Thales Fragoso
66f232574a Update stm32-data and rename RTC to Clock 2021-05-23 17:09:11 -03:00
Thales Fragoso
90b25e70d7 timer-rtc: Already ask for the timer frequency 2021-05-23 16:15:24 -03:00
Thales Fragoso
e501932cb5 Update generated files 2021-05-23 15:59:49 -03:00
Thales Fragoso
13698d58e4 Add timer/rtc impl macro 2021-05-23 15:59:09 -03:00
Dario Nieuwenhuis
5de9d6caed
Merge pull request #200 from thalesfragoso/h7-rcc 
H7 rcc
 2021-05-23 20:52:49 +02:00
Thales Fragoso
e49e3723a8 wip timers for embassy rtc 2021-05-22 23:58:40 -03:00
Thales Fragoso
212d905816 Update generated files 2021-05-22 23:55:44 -03:00
Thales Fragoso
2b1d7fe3ee Use Mutex and CriticalSection from bare-metal 1.0 2021-05-22 23:53:50 -03:00
Thales Fragoso
7c06518c52 Update generated files 2021-05-22 22:27:49 -03:00
Thales Fragoso
706992aef9 Support block names with underscores 2021-05-22 22:25:44 -03:00
Thales Fragoso
5e49a9932f Update generated files 2021-05-22 22:07:05 -03:00