Bob McWhirter
240616aa72
General clean-up and removal of dead code.
2021-06-03 14:25:17 -04:00
Bob McWhirter
d75bf143eb
Remove the exti_interrupts table.
2021-06-03 14:18:58 -04:00
Bob McWhirter
2c722ec0ee
Migrate sdmmc to macro tables.
2021-06-03 13:50:48 -04:00
Bob McWhirter
fe47f781be
Migrate exti_irq stuff to macro tables.
2021-06-03 13:35:27 -04:00
Bob McWhirter
75dc0fd542
Migrate TIM[2-5] to macro tables.
2021-06-03 13:23:21 -04:00
Bob McWhirter
c00a85f9a9
Refactor SPI signal pin macro.
2021-06-03 13:12:38 -04:00
Bob McWhirter
3dd497c1e6
Refactor some I2c signal pin macro.
2021-06-03 13:12:38 -04:00
Bob McWhirter
00892c7362
Migrate USART to macro tables.
2021-06-03 13:12:38 -04:00
Bob McWhirter
6958091b50
Move DAC, I2C, SPI and RNG to macro-tables.
2021-06-03 13:12:38 -04:00
Dario Nieuwenhuis
c7c6b0b464
Merge pull request #211 from bobmcwhirter/dac_v2
...
DAC v2 basics.
2021-06-02 16:16:27 +02:00
Ulf Lilleengen
c3a521066d
Add utility to enable debug
2021-06-02 15:23:10 +02:00
Ulf Lilleengen
4863d5e01e
Add a way to enable more features of the STM32L0 RCC
...
Add ability to enable the hsi48 clock. Code modified from the STM32L0XX
hal
2021-06-02 14:28:33 +02:00
Bob McWhirter
0c54c1afd1
DAC v2 basics.
2021-06-01 12:08:30 -04:00
Ulf Lilleengen
1a9a619033
Implement togglable output pin for Output
2021-05-31 09:33:33 +02:00
Dario Nieuwenhuis
553432a8e8
stm32: remove unused stuff from gen.py
2021-05-31 03:58:03 +02:00
Dario Nieuwenhuis
b2d8d23f4c
more fix
2021-05-31 03:25:10 +02:00
Dario Nieuwenhuis
d24b67512f
More fixes
2021-05-31 03:21:44 +02:00
Dario Nieuwenhuis
c4f8f1655e
Delete unused submodule
2021-05-31 02:59:06 +02:00
Dario Nieuwenhuis
60f12c78dd
Add resolver=2
2021-05-31 02:43:59 +02:00
Dario Nieuwenhuis
d8e4421fc6
Add stm32-metapac crate, with codegen in rust
2021-05-31 02:40:58 +02:00
Ulf Lilleengen
edec5833b3
Refactor SPI and fix write bug
...
* SPI write v2 was hanging in write due to an infinite loop
* SPI word write was not followed by a read back
The u8 and u16 write/read logic have been refactored into write_word and
read_word.
2021-05-27 23:05:42 +02:00
Dario Nieuwenhuis
c4ea7427fa
Update stm32-data
2021-05-27 13:46:46 +02:00
Dario Nieuwenhuis
3f6f1d99bb
Merge pull request #207 from lulf/clock-init
...
Enable clock by default for stm32l0
2021-05-27 13:36:14 +02:00
Ulf Lilleengen
d4dbeb6933
Handle case where pin value could be 0
...
In the case where GPIO mapping could look like this:
PA5:
SPI1_SCK: 0
The pin would not get any generated impl because the if expression would evaluate to false. Fix this for all cases in gen.py by comparing against None
~
2021-05-27 13:25:06 +02:00
Ulf Lilleengen
3669eba561
Use builder
2021-05-27 10:01:40 +02:00
Ulf Lilleengen
a41a812345
Move clocks to rcc mod
2021-05-27 09:50:11 +02:00
Ulf Lilleengen
6eaf224fec
No more systemclock
2021-05-26 21:46:57 +02:00
Ulf Lilleengen
bfa999a2e0
Assume tim2 in macro and remove clock setup in chip specific rcc init
...
Add temporary start_tim2() fn to Clock to assist macro in starting
embassy clock
2021-05-26 21:42:07 +02:00
Ulf Lilleengen
f960f5b105
Rework
2021-05-26 13:55:25 +02:00
Ulf Lilleengen
9743c59ad4
Simplify
2021-05-26 13:29:11 +02:00
Ulf Lilleengen
ea67940743
Refactor
2021-05-26 13:08:14 +02:00
Ulf Lilleengen
c501b162fc
Enable clock by default for stm32l0
...
Modify init function to return a Clock instance defined by a per-chip
SystemClock type and use this in macro setup
A proof of concept implementation for STM32 L0 chips.
This allows using embassy::main macros for STM32 devices that have the
clock setup logic.
2021-05-26 12:33:07 +02:00
Bob McWhirter
a9ec941dca
i2c v1
2021-05-25 14:47:07 -04:00
Bob McWhirter
aed8283cd5
Finalize i2c v2.
2021-05-25 10:02:40 -04:00
Ulf Lilleengen
ef254647f7
Add stm32l0
2021-05-25 13:32:10 +02:00
Ulf Lilleengen
1c10e746b6
Re-adds embassy macros for stm32
...
* Hook RCC config into chip config and use chip-specific RCC init
function
* RTC/clock setup is ignored for now
2021-05-25 13:30:42 +02:00
Thales Fragoso
9c5d4d9f8a
STM32 Clock: Use atomic-polyfill
2021-05-23 17:22:07 -03:00
Thales Fragoso
66f232574a
Update stm32-data and rename RTC to Clock
2021-05-23 17:09:11 -03:00
Thales Fragoso
90b25e70d7
timer-rtc: Already ask for the timer frequency
2021-05-23 16:15:24 -03:00
Thales Fragoso
e501932cb5
Update generated files
2021-05-23 15:59:49 -03:00
Thales Fragoso
13698d58e4
Add timer/rtc impl macro
2021-05-23 15:59:09 -03:00
Thales Fragoso
e49e3723a8
wip timers for embassy rtc
2021-05-22 23:58:40 -03:00
Thales Fragoso
212d905816
Update generated files
2021-05-22 23:55:44 -03:00
Thales Fragoso
2b1d7fe3ee
Use Mutex and CriticalSection from bare-metal 1.0
2021-05-22 23:53:50 -03:00
Thales Fragoso
7c06518c52
Update generated files
2021-05-22 22:27:49 -03:00
Thales Fragoso
706992aef9
Support block names with underscores
2021-05-22 22:25:44 -03:00
Thales Fragoso
5e49a9932f
Update generated files
2021-05-22 22:07:05 -03:00
Thales Fragoso
a0fe9e4645
Add unstable feature to give access to the pac
2021-05-22 15:34:49 -03:00
Thales Fragoso
2605dabca3
H7 RCC: Fix off by one error
2021-05-21 20:20:17 -03:00
Thales Fragoso
f5860c3c4c
Fix import on SDMMC
2021-05-21 20:20:17 -03:00
Thales Fragoso
1689ab2f8b
H7 RCC: Setup DBGMCU to enable debugging during wfi/wfe
2021-05-21 20:20:17 -03:00
Thales Fragoso
f9724fa576
Update generated code
2021-05-21 20:20:12 -03:00
Thales Fragoso
7f65f491e5
Finish initial H7 RCC support
2021-05-21 20:16:25 -03:00
Thales Fragoso
82ca5b495e
Update generated code
2021-05-21 20:14:52 -03:00
Thales Fragoso
2ea12d96ee
More work on H7 RCC
2021-05-21 20:13:39 -03:00
Thales Fragoso
054f0d51dc
H7: Add initial PLL configuration
2021-05-21 20:13:37 -03:00
Thales Fragoso
7e388fcf58
Add pac RCC for H7 (generated)
2021-05-21 20:11:27 -03:00
Dario Nieuwenhuis
447e4e6023
Regen
2021-05-21 19:35:15 +02:00
Dario Nieuwenhuis
35f1f65670
Generate mod regs just once, so rustfmt is way faster.
2021-05-21 19:34:41 +02:00
Dario Nieuwenhuis
f96db3d9d2
Remove ad-hoc imports from generated code.
2021-05-21 19:29:37 +02:00
Dario Nieuwenhuis
0d08e65235
Regen
2021-05-21 19:05:21 +02:00
Ulf Lilleengen
03bfbe51f5
Create DMA fn to select peripheral based on channel number
2021-05-21 18:38:33 +02:00
Ulf Lilleengen
32fbb32a84
Move exti setup into pac module
2021-05-21 18:38:33 +02:00
Ulf Lilleengen
a95c78b8bd
Merge exti macros into one and use simpler recursion
2021-05-21 18:38:33 +02:00
Ulf Lilleengen
56a902c19f
Update submodule commit
2021-05-21 18:38:33 +02:00
Ulf Lilleengen
b5373a1a64
Allow generating pac for STM32L0
2021-05-21 18:38:33 +02:00
Ulf Lilleengen
9fa5a2920f
Move regs trait implementation into generated pac
...
This allows handling devices that don't have DMA2
2021-05-21 18:38:33 +02:00
Ulf Lilleengen
0cd3236fa3
Generate exti interrupt handlers
...
Match interrupts starting with ^EXTI and generate init code and irq
handler for them
2021-05-21 18:38:33 +02:00
Ulf Lilleengen
8172db6d8e
Match on RNG interrupt names to support other RNG peripherals
2021-05-21 18:38:33 +02:00
Dario Nieuwenhuis
2e6c550355
Merge pull request #197 from rukai/fix_stm32_warnings
...
Fix warnings for embassy-stm32 and embassy-stm32-examples and add .cargo/config.toml + memory.x
2021-05-21 17:25:59 +02:00
Dario Nieuwenhuis
0bc440233c
Merge pull request #184 from bobmcwhirter/spi_v3
...
Spi v3
2021-05-21 17:21:36 +02:00
Bob McWhirter
b3eda9914b
Use the correct register names.
2021-05-20 14:24:40 -04:00
Bob McWhirter
222faccbab
Formatting.
2021-05-20 14:19:43 -04:00
Bob McWhirter
8b36269d65
Use modify instead of write for regs within a driver.
2021-05-20 14:14:31 -04:00
Bob McWhirter
d890ef98c1
Make SPIv3 work and improve v1 and v2.
2021-05-20 14:13:45 -04:00
Lucas Kent
82f9242df2
Fix warnings for embassy-stm32 and embassy-stm32-examples
2021-05-20 22:25:12 +10:00
Dario Nieuwenhuis
105c8504b6
Mark Unborrow as unsafe to implement
2021-05-19 23:29:33 +02:00
Bob McWhirter
0d1a0934c4
Cargo fmt.
2021-05-17 13:58:49 -04:00
Bob McWhirter
1872824d56
Add SPI v3, fix up v2's af_num and remove extraneous Error enums.
2021-05-17 13:56:13 -04:00
Bob McWhirter
a4fd1282e9
Generate _spi_v3 items.
2021-05-17 11:34:36 -04:00
Dario Nieuwenhuis
f7858631d8
stm32: fix build, add ci
2021-05-17 03:16:58 +02:00
Dario Nieuwenhuis
cd0d3c4b0d
Merge branch 'stm32-neo'
2021-05-17 02:16:17 +02:00
Dario Nieuwenhuis
2303364322
Standardize module structure, fix some build failures
2021-05-17 02:04:51 +02:00
Dario Nieuwenhuis
bdc3ada4b2
WIP: dma
2021-05-17 01:08:30 +02:00
Dario Nieuwenhuis
befc052cba
stm32/usart_v1: add read
2021-05-17 01:04:51 +02:00
Dario Nieuwenhuis
852ca5a1c5
stm32/usart_v1: implement tx
2021-05-17 01:04:51 +02:00
Dario Nieuwenhuis
bfc7f52e6d
Remove stm32.
...
stm32 developemnt continues in the `stm32-neo` branch for now.
2021-05-17 00:57:32 +02:00
Thales Fragoso
0f5ba6d4a9
SDMMC: Implement Default for Config and add docs
2021-05-15 21:21:06 -03:00
Thales Fragoso
86063ac2a2
Update generated code
2021-05-14 23:53:12 -03:00
Thales Fragoso
1e5f25aa41
Move parameters to a config struct
2021-05-14 23:47:58 -03:00
Thales Fragoso
a5d473be0e
Fix RNG interrupt name
2021-05-14 23:47:56 -03:00
Thales Fragoso
2cb66d6032
Update generated code
2021-05-14 23:44:51 -03:00
Thales Fragoso
ad720f83df
Expose data transfer timeout and implement configuration for BusWidth one
2021-05-14 23:43:11 -03:00
Thales Fragoso
359aaa5aeb
Implement embedded-sdmmc traits
2021-05-14 23:43:09 -03:00
Thales Fragoso
a130499c9a
Get rid of some warnings
2021-05-14 23:42:12 -03:00
Thales Fragoso
c183c352c7
SDMMC: Implement read and write
2021-05-14 23:42:12 -03:00
Thales Fragoso
490152d028
Better interrupt handling
2021-05-14 23:42:09 -03:00
Thales Fragoso
72fb3a7520
Init working :)
2021-05-14 23:40:28 -03:00
Thales Fragoso
0b607ca80a
Initial H7 sdmmc support
2021-05-14 23:40:28 -03:00
Dario Nieuwenhuis
180ca48d34
Remove AF_NUM const from pin traits, only use af_num fn
2021-05-15 03:18:15 +02:00
Dario Nieuwenhuis
e63c4bde0b
stm32: remove psel_bits
2021-05-15 03:07:59 +02:00
Dario Nieuwenhuis
8bb1bc3507
Move pin configuration to gpio mod
2021-05-15 03:07:59 +02:00
Bob McWhirter
2569d38ab4
Adjust pin-names to FooPin.
...
Move common bits up to spi/mod.rs.
Isolate the RNG interrupt in a sub-module to avoid conflict with the const.
2021-05-14 10:11:43 -04:00
Bob McWhirter
9e93a0999f
Add SPIv1, use cfg_attr to pick correct impl.
...
Add IRQ to impl_rng!() to accomodate RNG vs HASH_RNG split.
2021-05-13 14:28:53 -04:00
Ulf Lilleengen
3b86e85770
Bump version of critical-section to 0.2.1
2021-05-13 18:17:50 +02:00
Bob McWhirter
07db3ed7c1
Further improvement to SPIv2.
2021-05-12 14:18:42 -04:00
Bob McWhirter
36c16dbef8
Continuing to update clocks (unused now) and SPI
2021-05-12 10:46:18 -04:00
Bob McWhirter
7d52e1b350
Further work on SPI v2 blocking.
2021-05-11 11:25:01 -04:00
Dario Nieuwenhuis
e0809ab0fb
Switch to use PrioritX enums.
2021-05-11 01:34:24 +02:00
Dario Nieuwenhuis
7fa0e57172
Use critical_section crate
2021-05-11 01:15:30 +02:00
Bob McWhirter
8a79e2cbbf
Draft for partial review. Do not merge.
2021-05-10 16:17:58 -04:00
Bob McWhirter
0470abb353
Checkpoint.
2021-05-10 15:33:37 -04:00
Dario Nieuwenhuis
c4294d97ff
Fix DMA
2021-05-10 21:31:59 +02:00
Dario Nieuwenhuis
ac616a6dcf
Add dma scaffolding
2021-05-10 01:20:04 +02:00
Dario Nieuwenhuis
9492b8555c
rustfmt rng
2021-05-10 01:19:07 +02:00
Bob McWhirter
75fe03a7e6
Further clean-up and adjustments. Follow RM for FIPS.
2021-05-06 16:38:53 -04:00
Bob McWhirter
e8898b48f9
Clean up the impl_rng!() argument.
...
use poll_fn instead of impl'ing a Future directly.
Return errors when error conditions exist.
2021-05-06 14:58:41 -04:00
Bob McWhirter
e8537ca9c2
Implement async RNG, including rand_core sync traits.
2021-05-06 14:35:46 -04:00
Dario Nieuwenhuis
386e4bf0de
Remove unused files
2021-05-06 04:01:54 +02:00
Dario Nieuwenhuis
f5f98cdeab
Autogenerate features for family, peripherals and peripheral versions
2021-05-06 03:59:16 +02:00
Dario Nieuwenhuis
23ca2f9174
Autogenerate the tailored PAC for each chip
2021-05-06 03:43:46 +02:00
Bob McWhirter
4257512eb2
Limit to pub(crate).
2021-05-05 13:15:07 -04:00
Bob McWhirter
12c510f222
Rework pac re-exporting, canonicalize syscfg path, use it plus SYSCFG_BASE.
2021-05-05 13:12:53 -04:00
Bob McWhirter
14ce02eecf
Add the leaf features for peripherals.
2021-05-05 11:06:03 -04:00
Bob McWhirter
d8156b43b1
Generate some chip features by peripherals.
2021-05-05 11:01:02 -04:00
Bob McWhirter
7262c54f81
Move exti to use the const addr.
2021-05-05 10:38:57 -04:00
Bob McWhirter
e248baecd4
Regenerate with SYSCFG and EXTI base addresses.
2021-05-05 10:18:09 -04:00
Bob McWhirter
5495ad453b
Bump stm32-data to latest.
2021-05-05 09:58:38 -04:00
Dario Nieuwenhuis
7ef5806168
stm32: codegen interrupts
2021-05-01 03:08:52 +02:00
Bob McWhirter
0713947d67
Stub in RNG impl.
2021-04-26 14:11:46 -04:00
Dario Nieuwenhuis
936efd164d
USART codegen
2021-04-25 22:35:51 +02:00
xoviat
cb1b240d8b
stm32: fix spi/write
2021-04-24 17:10:51 -05:00
xoviat
1fef2d08fb
stm32: use interrupt for spi transmit
2021-04-24 13:07:28 -05:00
Dario Nieuwenhuis
6ba915a308
Codegen GPIO pins
2021-04-23 23:47:34 +02:00
Dario Nieuwenhuis
578d920723
Merge pull request #145 from lulf/generic-config
...
Pass config directly to chip specific configure function
2021-04-23 21:29:13 +02:00
Dario Nieuwenhuis
8fb1fc045f
Add stm32f401 peripherals
2021-04-23 19:32:47 +02:00
Dario Nieuwenhuis
8f24daf096
Actually do not build CAN on stm32f401
2021-04-23 19:19:49 +02:00
Dario Nieuwenhuis
c4e4401af4
Do not build CAN on stm32f401
2021-04-23 19:11:38 +02:00
Ulf Lilleengen
9586365b07
Pass config directly to chip specific configure function
...
This removes the need to duplicate the configuration for each individual
chip, but will instead pass on the configuration specified in the config
attribute.
Update nrf, stm32, rp macros with passing the config to a per-chip
configure function which assumes the appropriate configuration to be
passed to it.
To demonstrate this feature, the stm32l0xx clock setup and RTC is added which exposes
clock configuration different from stm32f4xx (and has a different set of timers and HAL APIs).
2021-04-22 09:10:46 +02:00
Dario Nieuwenhuis
29b5bae1d1
Codegen PoC
2021-04-20 03:37:49 +02:00
Dario Nieuwenhuis
ef4d9d243e
wip usart
2021-04-20 02:44:55 +02:00
Dario Nieuwenhuis
170536b073
stm32: add exti
2021-04-20 02:44:54 +02:00
Dario Nieuwenhuis
258ba533bd
Implement GPIO input
2021-04-20 02:30:14 +02:00
Dario Nieuwenhuis
aa65d5ccaf
it's alive
2021-04-20 02:30:13 +02:00
Dario Nieuwenhuis
c15411d1bd
Remove Pin from SPI
2021-04-14 17:04:40 +02:00
Dario Nieuwenhuis
8b1ffb2cb7
Remove Pin from GPIO traits
2021-04-14 17:04:40 +02:00
Dario Nieuwenhuis
59ccc45f28
Remove pin from Uart
2021-04-14 17:04:40 +02:00
xoviat
8e040cc5d2
stm32: add draft spi trait ( #130 )
2021-04-13 16:11:06 -05:00
xoviat
b1822f1438
stm32: add f407
2021-04-13 13:50:59 -05:00
xoviat
7cb46ac720
stm32: fix usb
2021-04-06 14:23:13 -05:00
