Commit Graph

30 Commits

Author SHA1 Message Date
Dario Nieuwenhuis
b91d1eaca0 stm32/rcc: add LSE/LSI to all chips, add RTC to more chips. 2023-10-11 04:12:38 +02:00
Dario Nieuwenhuis
d0d0ceec6a stm32/rcc: rename HSE32 to HSE 2023-10-11 01:06:44 +02:00
Dario Nieuwenhuis
0cfa8d1bb5 stm32/rcc: use more PLL etc enums from PAC. 2023-10-11 00:12:33 +02:00
Dario Nieuwenhuis
6186fe0807 stm32/rcc: use PLL enums from PAC. 2023-10-09 02:48:22 +02:00
Matt Ickstadt
f01609036f h7: implement RTC and LSE clock configuration 2023-10-06 13:28:30 -05:00
Dario Nieuwenhuis
4bfbcd6c72 stm32: use PAC enums for VOS. 2023-09-18 03:15:15 +02:00
xoviat
a6ef314be1 stm32: update configure_ls as agreed 2023-09-17 18:41:45 -05:00
xoviat
de2773afdd stm32/rcc: convert bus prescalers to pac enums 2023-09-16 17:41:11 -05:00
xoviat
11a78fb1e4 rcc: more cleanup 2023-09-08 18:20:58 -05:00
xoviat
4550452f43 rustfmt 2023-09-06 17:53:02 -05:00
xoviat
08410432b5 stm32: fix rcc merge 2023-09-06 17:51:40 -05:00
xoviat
3cf3caa3ab
Merge branch 'main' into rcc-bd 2023-09-06 17:49:29 -05:00
xoviat
c21ad04c2e stm32: extract lse/lsi into bd mod 2023-09-06 17:48:12 -05:00
Olle Sandberg
0d3ff34d80 adc: enable ADC and clock selection for STM32WLx 2023-09-06 06:57:30 +02:00
xoviat
531f51d0eb rcc/bd: consolidate mod 2023-08-27 15:01:09 -05:00
xoviat
3bf6081eb5 stm32: fix wl re-export 2023-08-27 09:41:31 -05:00
xoviat
4caa8497fc stm32: extract backupdomain into mod 2023-08-27 09:07:34 -05:00
xoviat
48085939e7 stm32/rcc: rename common to bus 2023-08-27 08:35:13 -05:00
Olle Sandberg
c80c323634 stm32-wl: set RTC clock source on RCC init 2023-08-16 14:41:00 +02:00
xoviat
a8a491212b stm32/rcc: cleanup merge 2023-07-30 10:18:54 -05:00
xoviat
2f18770e27 stm32/rcc: extract and combine ahb/apb prescalers 2023-07-30 09:52:30 -05:00
Phil Markgraf
3bae533066
Enable RTC on STM32WL chips (#1645)
* Add clippy allow to not report if same then branch

* Support enabling RTC clock on STM32WL

* Add clippy allow to not report if same then branch

* Support enabling RTC clock on STM32WL

* Add rtc example for stm32wl

* Address code review feedback
2023-07-15 13:40:23 +02:00
Eric Yanush
13f0c64a8c Fix APB clock calculation for several STM32 families 2023-03-16 21:21:39 -06:00
Christian Enderle
d21643c060 fix "prescaler none" which incorrectly set "prescaler divided by 3" 2023-02-12 11:36:57 +01:00
Timo Kröger
84240d49ea stm32wl: Fix RCC
* `MSIRGSEL = 1` was required for MSI accept the updated MSI range
* Reorder enable and clock switching to properly handle the jump from
the default 4MHz MSI to a higher MSI freuquency
2022-08-26 15:44:58 +02:00
Grant Miller
5ecbe5c918 embassy-stm32: Simplify time
- Remove unused `MilliSeconds`, `MicroSeconds`, and `NanoSeconds` types
- Remove `Bps`, `KiloHertz`, and `MegaHertz` types that were only used
for converting to `Hertz`
- Replace all instances of `impl Into<Hertz>` with `Hertz`
- Add `hz`, `khz`, and `mhz` methods to `Hertz`, as well as
free function shortcuts
- Remove `U32Ext` extension trait
2022-07-10 21:46:45 -05:00
chemicstry
3bf1e1d4aa Fix f2, wl compilation 2022-07-10 21:46:14 +03:00
chemicstry
1fd5022e72 Refactor IWDG to use LSI frequency from RCC 2022-07-10 20:59:36 +03:00
Ulf Lilleengen
484e0acc63 Add stm32 flash + bootloader support
* Add flash drivers for L0, L1, L4, WB and WL. Not tested for WB, but
should be similar to WL.
* Add embassy-boot-stm32 for bootloading on STM32.
* Add flash examples and bootloader examples
* Update stm32-data
2022-04-27 15:17:18 +02:00
Dario Nieuwenhuis
8b757e1aec Add stm32wlexx support 2022-04-08 03:43:58 +02:00