Dario Nieuwenhuis
|
b91d1eaca0
|
stm32/rcc: add LSE/LSI to all chips, add RTC to more chips.
|
2023-10-11 04:12:38 +02:00 |
|
xoviat
|
adf9ffb109
|
tests/stm32: use default clock config
|
2023-10-02 18:51:59 -05:00 |
|
xoviat
|
7cf327130e
|
stm32/low-power: create one critical-section for all time ops
|
2023-09-21 19:32:48 -05:00 |
|
xoviat
|
0dcb34fc7d
|
ci: fix tests
|
2023-09-17 19:03:45 -05:00 |
|
xoviat
|
e981cd4968
|
stm32: fix rtc wakeup timing and add dbg
|
2023-08-27 21:15:57 -05:00 |
|
xoviat
|
fb942e6675
|
stm32: re-export rtcclocksource
|
2023-08-27 09:25:14 -05:00 |
|
xoviat
|
db71887817
|
tests/stm32: add stop and cleanpu
|
2023-08-26 20:37:01 -05:00 |
|