1054: riscv fixes r=lulf a=swolix
With these changes I can run embassy on our RISC-V processor, please consider merging this, feedback is very welcome.
I don't fully understand the code in the executor, but I have implemented a critical section by globally disabling interrupts, which means the wfi inside the critical section will hang the whole thing.
Co-authored-by: Sijmen Woutersen <sijmen.woutersen@gmail.com>
1056: embassy-nrf: Add TWIS module r=Dirbaio a=kalkyl
Verified to be working on nrf9160
Co-authored-by: kalkyl <henrik.alser@me.com>
Co-authored-by: Henrik Alsér <henrik.alser@me.com>
1068: Add Default to some types r=Dirbaio a=mkj
These are a couple of places I've found `Default` to be handy
Co-authored-by: Matt Johnston <matt@ucc.asn.au>
Adding these changes enables us to define a channel using a mutable reference to `GPIOTE_CH(n)`, similar to how we can do with other drivers.
So instead of using:
```rust
let freq_in = InputChannel::new(
p.GPIOTE_CH0,
Input::new(&mut p.P0_19, embassy_nrf::gpio::Pull::Up),
embassy_nrf::gpiote::InputChannelPolarity::HiToLo,
);
```
we can use:
```rust
let freq_in = InputChannel::new(
&mut p.GPIOTE_CH0,
Input::new(&mut p.P0_19, embassy_nrf::gpio::Pull::Up),
embassy_nrf::gpiote::InputChannelPolarity::HiToLo,
);
```
1042: embassy-nrf: Add SPIS module r=Dirbaio a=kalkyl
Verified to be working on nrf9160
Co-authored-by: Henrik Alsér <henrik.alser@me.com>
Co-authored-by: Henrik Alsér <henrik.alser@ucsmindbite.se>
Co-authored-by: kalkyl <henrik.alser@me.com>
1065: embassy-nrf: Default disable UARTE (nrf9160) r=Dirbaio a=kalkyl
Uarte is enabled by default on the nrf9160, which is both bad for power consumption and renders the other "shared" peripherals unusable. This might be an SPM bug, but had the same issue with all pre-compiled SPM:s available out there, so adding this fix until we figure out.
Co-authored-by: Henrik Alsér <henrik.alser@me.com>
1057: stm32g0: Fix ADC for channels above 14 r=Dirbaio a=jaxter184
using the CHSELR register in sequence mode does not support ADC channels above 14. Also, it seems like the sequencer itself wasn't being used anyway, so I turned it off (maybe the whole block from L72..L76 could be removed?) and used a bit shift.
Co-authored-by: Jaxter Kim <jaxter.kim@elektron.se>
1060: feat: embassy-usb-logger and example for rpi pico r=Dirbaio a=lulf
* Add embassy-usb-logger which allows logging over USB for any device implementing embassy-usb
* Add example using logger for rpi pico
Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
1064: Fix LoRaWAN PHY settings for SX126x driver r=Dirbaio a=jbeaurivage
While working on #1023 / #1041, I noticed that the `lorawan_device::PhyTxRx` implementation does not conform to the LoRaWAN standard, and therefore devices using this driver could never communicate with a gateway. This PR backports the changes I've made to fix the offending parameters, and I can confirm that the driver now works with LoRaWAN networks.
* Set preamble length to 8 symbols
* Set polarity to inverted for received messages
Co-authored-by: Justin Beaurivage <justin@wearableavionics.com>
1052: stm32: Fix watchdog division by zero for 256 prescaler, add watchdog … r=lulf a=matoushybl
…example for H7
The problem is that `2u8.powi(8) == 0`, which causes division by zero.
1053: Disable MMC interrupts r=lulf a=matoushybl
MMC interrupts can cause firmware hangup - refer to: https://github.com/stm32-rs/stm32h7xx-hal/issues/275 for more information
Fixes#594
Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
