Commit Graph

880 Commits

Author SHA1 Message Date
Malte Brieske
405649ddc7 fix stm32f7 example runner command for probe-rs-cli 2023-04-26 18:58:28 +02:00
ceekdee
52decfb16c Add nightly feature specification for lora-phy. 2023-04-26 10:51:02 -05:00
ceekdee
91047c61b9 Correct nightly feature specification. 2023-04-26 10:18:40 -05:00
Dario Nieuwenhuis
054ca17f66 Switch from probe-run to probe-rs-cli.
- probe-run screwed up the last release 2 weeks ago and it's still not fixed (issue 391). Doesn't look well maintained.
- Even when it's not broken, it lags behind probe-rs-cli in new chips support because it's slow in updating probe-rs.
2023-04-26 17:00:51 +02:00
ceekdee
f729d2d060 Deprecate original LoRa drivers. Update rust-lorawan releases. 2023-04-25 13:51:19 -05:00
ceekdee
73f25093c7 Add lora-phy examples. 2023-04-23 18:32:34 -05:00
Chuck Davis
a3f727e2e1
Merge branch 'embassy-rs:master' into master 2023-04-23 16:43:45 -05:00
bors[bot]
0dea7b02d6
Merge #1387
1387: rp: add PWM api r=Dirbaio a=pennae

add PWM api ~~including interrupts and async support.~~

depends on https://github.com/embassy-rs/rp-pac/pull/1

**TODO**:

- [x] example
- [x] test
- [x] move divmode to typelevel
- [x] deduplicate `new_*` functions

Co-authored-by: pennae <github@quasiparticle.net>
2023-04-23 20:50:57 +00:00
pennae
a4866ad278 rp: add PWM api 2023-04-23 22:49:15 +02:00
ceekdee
0a2f7b4661 Use released lora-phy. 2023-04-21 17:41:25 -05:00
ceekdee
02c86bca52 Add external LoRa physical layer functionality. 2023-04-21 01:20:46 -05:00
sander
f64d1131b6 embassy-boot: update ci and examples to use the nightly flag 2023-04-20 10:22:44 +02:00
xoviat
f589247c1f stm32/rtc: cleanup and consolidate 2023-04-18 20:38:18 -05:00
bors[bot]
216b120f15
Merge #1379
1379: enable inline-asm feature for cortex-m in examples r=Dirbaio a=pennae

inline assembly is supported since rust 1.59, we're way past that. enabling this makes the compiled code more compact, and on rp2040 even decreses memory usage by not needing thunks in sram.

Co-authored-by: pennae <github@quasiparticle.net>
2023-04-18 19:25:49 +00:00
pennae
8a9136e4e4 enable inline-asm feature for cortex-m in examples
inline assembly is supported since rust 1.59, we're way past that.
enabling this makes the compiled code more compact, and on rp2040
even decreses memory usage by not needing thunks in sram.
2023-04-18 21:07:36 +02:00
anton smeenk
3260f6b2af stm32/spi: add new_txonly_nosck constructor, for neopixels, with an example in the stm32g0 directory. 2023-04-18 20:59:25 +02:00
Dario Nieuwenhuis
82dd7a5f8c stm32/sdmmc: add init_card retry. 2023-04-17 21:48:47 +02:00
bors[bot]
9202dbf32a
Merge #1369
1369: Lora AFIT r=Dirbaio a=Dirbaio

Extracted out of #1367 

Probably we should wait until `rust-lorawan` is merged+released?

Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
2023-04-17 13:50:49 +00:00
Ulf Lilleengen
4044d728a6
update to released versions 2023-04-17 15:44:58 +02:00
bors[bot]
6acc361109
Merge #1371 #1374
1371: RTC r=Dirbaio a=xoviat

This adds RTC for most of the stm32 chips. Nearly all of the work was not done by me, but I took it the last bit by disabling the chips that weren't working. I think it would be easier to enable them in future PRs if requested.

1374: stm32: remove TIMX singleton when used on timer driver r=Dirbaio a=xoviat

After multiple ways of looking at this, this is the best solution I could think of.

Co-authored-by: Mathias <mk@blackbird.online>
Co-authored-by: xoviat <xoviat@users.noreply.github.com>
2023-04-17 01:29:05 +00:00
xoviat
90c1422381 stm32/rtc: remove chrono datetime and add converters 2023-04-16 19:30:42 -05:00
xoviat
9e1ddeac86 stm32: fix defective example 2023-04-16 18:32:55 -05:00
Ulf Lilleengen
63941432e3 Update to rust-lorawan with afit support 2023-04-15 01:00:12 +02:00
Dario Nieuwenhuis
224eaaf797 stm32/sdmmc: switch to AFIT. 2023-04-15 00:58:58 +02:00
Dario Nieuwenhuis
577f060d24 Release embassy-sync v0.2.0 2023-04-13 23:40:49 +02:00
Sebastian Goll
ab6179fb07 Fix duplicate package name 2023-04-11 12:03:08 +02:00
Dario Nieuwenhuis
dee1d51ad3 stm32: remove subghz feature.
It's available only on WL. if you're using a WL, you want subghz for sure.
2023-04-07 02:28:36 +02:00
bors[bot]
da8258b767
Merge #1330
1330: stm32/pwm: add complementary pwm r=Dirbaio a=xoviat

This implements complementary PWM with dead time on many supported targets. The specific dead-time programming functions are passed through directly to the user, which is a bit ugly but the best compromise I could reach for now.

Co-authored-by: xoviat <xoviat@users.noreply.github.com>
2023-04-06 21:33:17 +00:00
Dario Nieuwenhuis
be37eee13d Update embedded-hal crates. 2023-04-06 22:41:50 +02:00
bors[bot]
89279dcdc9
Merge #1333
1333: STM32: Adc V1 r=Dirbaio a=GrantM11235

Based on #947

Co-authored-by: Matthew W. Samsonoff <matt.samsonoff@gmail.com>
Co-authored-by: Grant Miller <GrantM11235@gmail.com>
2023-04-06 17:16:50 +00:00
Dario Nieuwenhuis
611d023829 stm32: add H5 support. 2023-04-06 18:59:37 +02:00
xoviat
31ef783ac1 stm32/pwm: fix unused import 2023-04-05 18:18:05 -05:00
xoviat
9f1dac3f5d stm32/pwm: add complementary pwm example 2023-04-05 18:07:07 -05:00
Grant Miller
7c53ebd576 Fix example reference voltage 2023-04-05 16:28:28 -05:00
Grant Miller
efd9e18321 Fix example 2023-04-05 15:12:27 -05:00
Matthew W. Samsonoff
28b8ac4b62 Update STM32F0 ADC example to use read_internal 2023-04-05 14:34:24 -05:00
Matthew W. Samsonoff
7e9e628eb9 Add ADC example for STM32F0 2023-04-05 14:34:24 -05:00
Rasmus Melchior Jacobsen
2a49e11cb0 Align flash examples 2023-04-05 10:55:31 +02:00
Rasmus Melchior Jacobsen
57d3d4d581 Align stm32 bootloader example 2023-04-05 10:29:45 +02:00
Rasmus Melchior Jacobsen
84bfe9b8c9 Align examples with bootloader changes 2023-04-04 22:44:21 +02:00
bors[bot]
5923e143e3
Merge #1321
1321: executor: add Pender, rework Cargo features. r=Dirbaio a=Dirbaio

This introduces a `Pender` struct with enum cases for thread-mode, interrupt-mode and
custom callback executors. This avoids calls through function pointers when using only
the thread or interrupt executors. Faster, and friendlier to `cargo-call-stack`.

`embassy-executor` now has `arch-xxx` Cargo features to select the arch and to enable
the builtin executors (thread and interrupt).

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-04-04 15:50:12 +00:00
bors[bot]
143105eeb6
Merge #1313
1313: (embassy-stm32): rework bufferedUart to get rid of PeripheralMutex r=Dirbaio a=MathiasKoch

New implementation is very similar to the implementation of embassy-nrf & embassy-rp. 

Also adds embedded-hal traits to bufferedUart.

**NB**: Still needs testing on actual hardware

Co-authored-by: Mathias <mk@blackbird.online>
2023-04-04 15:14:07 +00:00
Mathieu Dupont
932b80ca8a run fmt 2023-04-03 16:52:57 +02:00
Mathieu Dupont
4ce1c5f27d Add MCO support for L4 and F4 families 2023-04-03 16:41:25 +02:00
Dario Nieuwenhuis
d3c4e4a20a executor: add Pender, rework Cargo features.
This introduces a `Pender` struct with enum cases for thread-mode, interrupt-mode and
custom callback executors. This avoids calls through function pointers when using only
the thread or interrupt executors. Faster, and friendlier to `cargo-call-stack`.

`embassy-executor` now has `arch-xxx` Cargo features to select the arch and to enable
the builtin executors (thread and interrupt).
2023-04-03 03:09:11 +02:00
Mathias
472dc6b7d1 Fix interrupt handling so it is similar to before the rework, and fix examples 2023-03-31 15:57:35 +02:00
Caleb Jamison
12d6e37b3f Example using the PIO to drive WS2812 aka Neopixel RGB leds
This example also uses a pio program compiled at runtime, rather than one built at compile time. There's no reason to do that, but it's probably useful to have an example that does this as well.
2023-03-11 02:58:28 -05:00
bors[bot]
8fd30e407c
Merge #1267
1267: macros: better validation of function signatures. r=Dirbaio a=Dirbaio

Fixes #1266

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-03-08 08:17:44 +00:00
Dario Nieuwenhuis
b2c6dc45e3 Fix examples broken by the macro fix. 2023-03-08 09:17:01 +01:00
Mehmet Ali Anil
935633c90b Merge upstream 2023-03-07 23:16:54 +01:00
Mehmet Ali Anil
bc0cb43307 Bump embedded-storage-async to 0.4 2023-03-06 22:16:36 +01:00
Dario Nieuwenhuis
5249996d28 nrf/usb: switch to new interrupt binding, fix vbus detect on nrf53. 2023-03-06 00:17:51 +01:00
Dario Nieuwenhuis
5913553cb1 nrf/twis: switch to new interrupt binding. 2023-03-06 00:17:51 +01:00
Dario Nieuwenhuis
36319fc121 nrf/temp: switch to new interrupt binding. 2023-03-06 00:17:51 +01:00
Dario Nieuwenhuis
9e58d9274c nrf/twim: switch to new interrupt binding. 2023-03-06 00:17:51 +01:00
Dario Nieuwenhuis
9f5762d365 nrf/spis: switch to new interrupt binding. 2023-03-06 00:17:51 +01:00
Dario Nieuwenhuis
a32e82029a nrf/spim: switch to new interrupt binding. 2023-03-06 00:17:51 +01:00
Dario Nieuwenhuis
2dc5608203 nrf/saadc: switch to new interrupt binding. 2023-03-06 00:17:51 +01:00
Dario Nieuwenhuis
d113fcfe32 nrf/rng: make available on all chips, use Instance trait, switch to new interrupt binding. 2023-03-06 00:17:51 +01:00
Dario Nieuwenhuis
96788ac93a nrf/qspi: switch to new interrupt binding. 2023-03-06 00:17:51 +01:00
Dario Nieuwenhuis
c66b28e759 nrf/qdec: make available on all chips, use Instance trait, switch to new interrupt binding. 2023-03-06 00:17:51 +01:00
Dario Nieuwenhuis
f8f1d3bcf0 nrf/pdm: make available on all chips, use Instance trait, switch to new interrupt binding. 2023-03-06 00:17:51 +01:00
Dario Nieuwenhuis
34563b74aa nrf/i2s: switch to new interrupt binding. 2023-03-06 00:17:51 +01:00
Dario Nieuwenhuis
63b75eaf64 nrf/timer: remove awaitable. 2023-03-06 00:17:51 +01:00
Dario Nieuwenhuis
9cf000ef4e nrf/uart: switch to new interrupt binding. 2023-03-06 00:17:51 +01:00
Dario Nieuwenhuis
bf013be9ba
Merge pull request #1232 from embassy-rs/nrf-qspi-fixes
nrf/qspi: nrf53 support, u32 addrs, remove const generic, add raw read/write.
2023-03-05 03:19:11 +01:00
Dario Nieuwenhuis
f7dfc49c5c nrf/qspi: add _raw variants of methods that don't do bounds checks.
Useful for the nRF7002, which presents as a "fake" QSPI flash, and
the "capacity" concept doesn't really apply to it.
2023-03-05 02:55:00 +01:00
Dario Nieuwenhuis
8eb8ea6174 nrf/qspi: remove FLASH_SIZE const generic param. 2023-03-05 02:33:02 +01:00
Dario Nieuwenhuis
75f69803af nrf/qspi: always use u32 for addresses. 2023-03-05 02:30:53 +01:00
Dario Nieuwenhuis
916f94b366 nrf/buffered_uarte: make available on stable. 2023-03-04 15:12:49 +01:00
Dario Nieuwenhuis
ccc224c81f nrf/buffered_uarte: remove PeripheralMutex, make it work without rts/cts.
> dirbaio: so I was checking how zephyr does UARTE RX on nRF
> dirbaio: because currently we have the ugly "restart DMA on line idle to flush it" hack
> dirbaio: because according to the docs "For each byte received over the RXD line, an RXDRDY event will be generated. This event is likely to occur before the corresponding data has been transferred to Data RAM."
> dirbaio: so as I understood it, the only way to guarantee the data is actually transferred to RAM is to stop+restart DMA
> dirbaio: well, guess what?
> dirbaio: they just count RXDRDY's, and process that amount of data without restarting DMA
> dirbaio: with a timer configured as counter https://github.com/zephyrproject-rtos/zephyr/blob/main/drivers/serial/uart_nrfx_uarte.c#L650-L692
> dirbaio: 🤔🤷⁉️
> dirbaio: someone saying you can do the "hook up rxdrdy to a counter" trick, someone else saying it's wrong 🤪 https://devzone.nordicsemi.com/f/nordic-q-a/28420/uarte-in-circular-mode

So we're going to do just that!

- BufferedUarte is lock-free now. No PeripheralMutex.
- The "restart DMA on line idle to flush it" hack is GONE. This means
  - It'll work correctly without RTS/CTS now.
  - It'll have better throughput when using RTS/CTS.
2023-03-04 15:12:49 +01:00
Dario Nieuwenhuis
c4f4aa10f9
Merge pull request #1244 from embassy-rs/interruptexecutor
cortex-m/executor: don't use the owned interrupts system.
2023-03-01 22:38:27 +01:00
Dario Nieuwenhuis
6dbb631f1e Example fixes. 2023-03-01 01:32:42 +01:00
Dario Nieuwenhuis
4dfa32b1e0 cortex-m/executor: don't use the owned interrupts system.
Preparation for #1224.
2023-02-28 23:07:20 +01:00
Dario Nieuwenhuis
bc71230cd0 examples/std: fix net running out of sockets. 2023-02-26 21:50:12 +01:00
chemicstry
42462681bd stm32/sdmmc: Implement proper clock configuration 2023-02-23 16:57:21 +02:00
Dario Nieuwenhuis
ada3d5be7c nrf: rename UARTETWISPIn -> SERIALn
The UARTETWISPIn naming is quite horrible. With the nRF53, Nordic realized this
and renamed the interrupts to SERIALn. Let's copy that for our peripheral names, in nrf53 and nrf91.
2023-02-21 22:41:23 +01:00
Dario Nieuwenhuis
13328c58d3
examples/stm32wb: do not reserve words at start of RAM.
They're used to communicate from the app to ST's OTA bootloader. See AN5247. 

This bootloader is optional, must be flashed by the user, and requires changing the FLASH start address as well, so the current memory regions still require modifications to use it. Therefore there's no point in reserving these words.

Thanks @adamgreig for investigating the purpose.
2023-02-20 01:01:01 +01:00
bors[bot]
1567e724f9
Merge #1218 #1219
1218: Lora: sx126x: Change timing window to match values found experimentally. r=Dirbaio a=CBJamo

As mentioned in #1188.

1219: stm32/sdmmc: Fix SDIOv1 writes r=Dirbaio a=chemicstry

This fixes writes on sdmmc v1 (SDIO). I'm pretty sure I tested writes in #669, but maybe I was just lucky or I just forgot.

There were two problems:
- Writes require DMA FIFO mode, otherwise SDIO FIFO is under/overrun depending on sdio/pclk2 clock ratio.
- Hardware flow control is broken for sdmmc v1 (I checked F1 and F4 erratas). This causes clock glitches above 12 MHz and results in write CRC errors.

Co-authored-by: Caleb Jamison <caleb@cbjamo.com>
Co-authored-by: chemicstry <chemicstry@gmail.com>
2023-02-19 23:01:44 +00:00
bors[bot]
4ad255b34b
Merge #1217
1217: Fix a typo in "PioPeripheral" r=Dirbaio a=SekoiaTree

Renames "PioPeripherial" to "PioPeripheral" (without the second i).

Co-authored-by: sekoia <sequoia.1009@gmail.com>
2023-02-19 22:46:57 +00:00
Dario Nieuwenhuis
272982ee54 examples/stm32wb: fix linker script.
cortex-m-rt 0.7.2 now enforces the stack is 8-byte aligned. Stack is placed
at `ORIGIN(RAM) + LENGTH(RAM)` by default, which wasn't 8-byte-aligned. See https://github.com/rust-embedded/cortex-m/discussions/469

ST trims 8 bytes from start of RAM, and uses the whole 192kb, so let's just
copy that:

bceb1dae09/Drivers/CMSIS/Device/ST/STM32WBxx/Source/Templates/gcc/linker/stm32wb55xx_flash_cm4.ld (L48)
2023-02-19 23:02:31 +01:00
chemicstry
a53f525f51 stm32/sdmmc: Fix SDIOv1 writes 2023-02-18 01:37:06 +02:00
sekoia
e641db1f75 Fix a typo in "PioPeripheral" 2023-02-15 14:10:07 +01:00
Dario Nieuwenhuis
76642b3a3c fix h7 examples 2023-02-10 23:35:44 +01:00
Dario Nieuwenhuis
a509af4bc0 exmaples/dns: don't use the socket. 2023-02-10 23:00:16 +01:00
Ulf Lilleengen
cd440a49d6
Rewrite to use a single socket 2023-02-10 17:46:08 +01:00
Ulf Lilleengen
9cfea693ed
Add DNS socket to embassy-net 2023-02-10 17:45:03 +01:00
Dario Nieuwenhuis
86487db5d1 usb: use InterfaceNumber in msos. 2023-02-08 00:30:53 +01:00
Dario Nieuwenhuis
3af991ab63 usb: unify ControlHandler+DeviceStateHandler, route all control requests to all handlers.
- Allows classes to handle vendor requests.
- Allows classes to use a single handler for multiple interfaces.
- Allows classes to access the other events (previously only `reset` was available).
2023-02-08 00:17:08 +01:00
alexmoon
aa21aebb0b Lazily encode UTF16 values and add docs 2023-02-07 14:24:35 -05:00
alexmoon
9f9230ae7a Convert MS OS descriptor builder to a writer API
This brings it inline with the other embassy-usb descriptor APIs and allows it to integrate well with the Builder to allow class constructors to add MS OS descriptors.

Also adds a `usb_serial_winusb` example to demonstrate how to use the API.
2023-02-07 14:24:35 -05:00
Dario Nieuwenhuis
b5cf332cc0 nrf: docs. 2023-02-01 01:17:41 +01:00
bors[bot]
ffa75e1e39
Merge #1173 #1174
1173: nRF examples crates names r=lulf a=davidedellagiustina

Fixed nRF examples crates' names: they had the same names and they were conflicting during compilation (Cargo warning).

1174: add missing copy of icmpv6 checksum r=lulf a=lulf

add proto-ipv6 feature to stm32h7 example to catch issues in CI

Co-authored-by: Davide Della Giustina <davide@dellagiustina.com>
Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
2023-01-24 09:26:21 +00:00
Ulf Lilleengen
2a0ea52878
add missing copy of icmpv6 checksum
add proto-ipv6 feature to stm32h7 example to catch issues in CI
2023-01-24 10:25:37 +01:00
Davide Della Giustina
32bdc54ccb
Changed crates' names for nrf examples since they were conflicting 2023-01-24 08:27:53 +00:00
Dario Nieuwenhuis
fe15a7beee net: allocate space for 2 sockets, needed for dhcp. 2023-01-19 14:44:01 +01:00
Paweł Jan Czochański
8f4fae9b36 Add smoltcp dhcp socket configuration 2023-01-19 14:44:01 +01:00
chemicstry
7d34f4f538 stm32/usb_otg: Add F4 usb_ethernet example 2023-01-18 02:37:02 +02:00
Dario Nieuwenhuis
355761fd68 stm32: add stm32c0 examples. 2023-01-17 21:28:16 +01:00
bors[bot]
b6c8505697
Merge #1142
1142: More rp2040 BufferedUart fixes r=Dirbaio a=timokroeger

* Refactor init code
* Make it possible to drop RX without breaking TX (or vice versa)
* Correctly handle RX buffer full scenario

Co-authored-by: Timo Kröger <timokroeger93@gmail.com>
2023-01-14 00:07:02 +00:00