Commit Graph

3317 Commits

Author SHA1 Message Date
883e28a0fb usb: add first, last params to ControlPipe data_in, data_out. 2022-05-30 00:08:28 +02:00
1ec2e5672f usb: remove is_stalled, set_stalled from Endpoint.
They're unused, and I believe it's not allowed for classes to
stall EPs on their own?
2022-05-30 00:07:15 +02:00
98d8c9373d usb: delay bus.set_address() to after ending the control transfer. 2022-05-30 00:03:36 +02:00
842c7d08ab Merge #787
787: Update embedded-hal-async to 0.1.0-alpha.1 r=Dirbaio a=Dirbaio

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-05-29 20:34:41 +00:00
6320e30adf Update embedded-hal-async to 0.1.0-alpha.1 2022-05-29 22:34:08 +02:00
1c2b27dcad embassy-stm32: g0: add PLL clock source
STM32G0 SYSCLK can be sourced from PLLRCLK. Given that the HSI runs at
16 MHz and the HSE range is 4-48 MHz, the PLL is the only way to reach
64 MHz. This commit adds `ClockSrc::PLL`.

The PLL sources from either HSI16 or HSE, divides it by `m`, and locks
its VCO to multiple `n`. It then divides the VCO by `r`, `p`, and `q`
to produce up to three associated clock signals:

  * PLLRCLK is one of the inputs on the SYSCLK mux. This is the main
    reason the user will configure the PLL, so `r` is mandatory and
	the output is enabled unconditionally.
  * PLLPCLK is available as a clock source for the ADC and I2S
    peripherals, so `p` is optional and the output is conditional.
  * PLLQCLK exists only on STM32G0B0xx, and exists only to feed the
    MCO and MCO2 peripherals, so `q` is optional and the output is
	conditional.

When the user specifies `ClockSrc::PLL(PllConfig)`, `rcc::init()`
calls `PllConfig::init()` which initializes the PLL per [RM0454]. It
disables the PLL, waits for it to stop, enables the source
oscillator, configures the PLL, waits for it to lock, and then
enables the appropriate outputs. `rcc::init()` then switches the
clock source to PLLRCLK.

`rcc::init()` is now also resonsible for calculating and setting flash
wait states. SYSCLCK < 24 MHz is fine in the reset state, but 24-48 MHz
requires waiting 1 cycle and 48-64 MHz requires waiting 2 cycles. (This
was likely a blocker for anyone using HSE >= 24 MHz, with or without
the PLL.) Flash accesses are now automatically slowed down as needed
before changing the clock source, and sped up as permitted after
changing the clock source. The number of flash wait states also
determines if flash prefetching will be profitable, so that is now
handled automatically too.

[RM0454]: https://www.st.com/resource/en/reference_manual/rm0454-stm32g0x0-advanced-armbased-32bit-mcus-stmicroelectronics.pdf
2022-05-27 23:56:42 -05:00
82e873d920 Merge #783
783: Reimplement BufRead for BufferedUart r=Dirbaio a=chemicstry

The `AsyncBufRead` implementation for `BufferedUart` was removed in https://github.com/embassy-rs/embassy/pull/752, this PR reimplements it from `embedded-io`. This allows reading `BufferedUart` without copying slices.

Co-authored-by: chemicstry <chemicstry@gmail.com>
2022-05-27 16:03:19 +00:00
9772645718 Revert "Fix irq pend behavior"
This reverts commit 9a447f1359.
2022-05-26 23:36:25 +03:00
9a447f1359 Fix irq pend behavior 2022-05-26 23:24:02 +03:00
c3b899c470 Implement BufRead for nrf BufferedUarte 2022-05-26 23:15:06 +03:00
e10fc2bada Async shared bus for SPI & I2C + rename embassy-traits (#769)
* Rename embassy-traits to embassy-embedded-hal

* Rename embassy-traits to embassy-embedded-hal

* Add shared bus for SPI and I2C

* rustfmt

* EHA alpha 1

* Rename embedded-traits in examples

* rustfmt

* rustfmt

Co-authored-by: Henrik Alsér <henrik@mindbite.se>
2022-05-26 18:54:58 +02:00
667abe6d1d Simplify example 2022-05-26 14:11:15 +03:00
4b6162694a Fix removed space 2022-05-26 14:05:56 +03:00
1d951a54be Reimplement BufRead for BufferedUart 2022-05-26 14:02:55 +03:00
a5aea995a8 WIP embassy-net v2 2022-05-25 19:56:22 +02:00
36a1f20364 Merge #770
770: Add open-drain support for embassy-rp r=danbev a=danbev

This commit adds open-drain support for embassy-rp by adding a new type
named `embassy_rp::gpio::OutputOpenDrain`.



Co-authored-by: Daniel Bevenius <daniel.bevenius@gmail.com>
2022-05-21 10:26:55 +00:00
027ab3371e Impl OutputPin/StatefulOutputPin/ToggleableOutputPin
This commit implements embedded_hal_02::digital::v2 OutputPin,
StatefulOutputPin, and ToggleableOutputPin for embassy-rp.
2022-05-21 10:11:12 +02:00
c8461709e3 Add open-drain support for embassy-rp
This commit adds open-drain support for embassy-rp by adding a new type
named embassy_rp::gpio::OutputOpenDrain.
2022-05-21 10:11:06 +02:00
e4072d7ff3 Merge #780
780: Add new lines between SIO methods r=Dirbaio a=danbev

The commit adds new lines between the SIO functions which at least for
me improves readability and is consistent with the other methods in the
trait.

Co-authored-by: Daniel Bevenius <daniel.bevenius@gmail.com>
2022-05-19 20:17:32 +00:00
4b0dca1802 Add new lines between SIO methods
The commit adds new lines between the SIO functions which at least for
me improves readability and is consistent with the other methods in the
trait.
2022-05-19 13:45:40 +02:00
d0fe9af458 Merge pull request #771 from embassy-rs/net-split
net: add split() to tcpsocket
2022-05-19 07:13:24 +02:00
dd7a34fdc8 Merge pull request #773 from danbev/embassy-rp-ouput-drop
Impl drop for embassy-rp gpio Output
2022-05-19 07:13:13 +02:00
220c6c83cb Merge pull request #779 from danbev/embassy-rp-toggleable-output-impl
Impl ToggleableOutputPin for embassy-rp Output
2022-05-19 07:12:43 +02:00
e3b8e35498 Make embassy-net nightly-only.
It's useless without async traits, so juggling the `nightly` feature
around is not worth the pain.
2022-05-19 06:15:01 +02:00
0b2f43c391 net: add split() to tcpsocket 2022-05-19 06:14:05 +02:00
99c2defa76 squash! Impl ToggleableOutputPin for embassy-rp Output
Use value_xor as suggested in pull request feedback.
2022-05-19 06:07:14 +02:00
7743b8e1ae Merge #776
776: Automatically set ADC clock prescaler on v2 ADC to respect max frequency r=Dirbaio a=matoushybl



Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2022-05-19 04:00:23 +00:00
da97944322 Impl ToggleableOutputPin for embassy-rp Output 2022-05-19 05:33:42 +02:00
240bef8c9f Merge #778
778: Update embedded-io to 0.3 r=Dirbaio a=Dirbaio

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-05-18 22:36:49 +00:00
47ceee47d5 Update embedded-io to 0.3 2022-05-19 00:36:18 +02:00
261043fc73 Merge #777
777: usb-ncm: remove useless Cell. r=Dirbaio a=Dirbaio

This allows the CDC-NCM class struct to be Send, so you can run
it at a different priority than the main USB stack task.

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-05-18 19:54:38 +00:00
5eca119312 usb-ncm: remove useless Cell.
This allows the CDC-NCM class struct to be Send, so you can run
it at a different priority than the main USB stack task.
2022-05-18 21:54:13 +02:00
53f65d8b09 Automatically set ADC clock prescaler on v2 ADC to respect max frequency 2022-05-18 18:34:36 +02:00
a3e0fcef0b Impl drop for embassy-rp gpio Output
This commit implements drop for embassy-rp gpio Output which is
currently a todo.
2022-05-17 08:43:03 +02:00
3d1501c020 Merge #772
772: nrf/buffered_uarte: fix out of bounds on read. r=Dirbaio a=Dirbaio

🙈 

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-05-14 00:21:27 +00:00
833b3a370a nrf/buffered_uarte: fix out of bounds on read. 2022-05-14 02:20:40 +02:00
13bcb5ffb6 Merge #768
768: nrf/usb: fix control out transfers getting corrupted due to ep0rcvout sticking from earlier. r=Dirbaio a=Dirbaio

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-05-12 16:46:35 +00:00
0764fad587 nrf/usb: fix control out transfers getting corrupted due to ep0rcvout sticking from earlier. 2022-05-12 18:45:10 +02:00
5fd55f9529 usb: parse request in embassy-usb instead of the driver. 2022-05-12 18:14:48 +02:00
45c0f1ab88 Merge #756
756: Add async quadrature decoder for embassy-nrf r=Dirbaio a=kalkyl

Thsi PR adds an async interface to the QDEC peripheral to embassy-nrf, that can be used for rotary encoders for example.

Co-authored-by: Henrik Alsér <henrik@mindbite.se>
Co-authored-by: Henrik Alsér <henrik.alser@me.com>
Co-authored-by: Henrik Alsér <henrik.alser@me.com>
2022-05-12 13:40:08 +00:00
93cbd079ec Remove OnDrop handler, start sampling in new 2022-05-12 15:35:32 +02:00
0be9184efc Merge branch 'embassy-rs:master' into qdec 2022-05-12 15:24:46 +02:00
30d4d0e9d7 Merge #763 #766
763: Misc USB improvements r=Dirbaio a=Dirbaio

The "simplify control in/out handlng" commit gives a -2kb code size improvement.

766: Make usb_serial examples work on windows r=Dirbaio a=timokroeger

Windows shows `error 10` when using CDC ACM on non composite devices.
Workaround is to use IADS:
https://developer.nordicsemi.com/nRF_Connect_SDK/doc/1.9.1/kconfig/CONFIG_CDC_ACM_IAD.html#help

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
Co-authored-by: Timo Kröger <timo.kroeger@hitachienergy.com>
2022-05-12 13:04:29 +00:00
3f9fdc0dd3 Merge #767
767: Stm32 fixes r=lulf a=jr-oss

Using embassy on STM32 Discovery board showed problems with
- USART with parity
- Clock settings (CFGR) when using PLL and prescaler
- Flash ACR settings

This PR attempts to fix these


Co-authored-by: Ralf <jr-oss@gmx.net>
2022-05-12 07:15:53 +00:00
c90968bb70 stm32/rcc: Modify only relevant CFGR bits and keep the settings previously done.
PLL settings remained intact because these bits are not writable when PLL is enabled,
but prescaler settings were overwritten by selecting PLL as sysclk (CFGR.SW[1:0]).
2022-05-12 09:09:39 +02:00
1a216958ac stm32/rcc: Set flash prefetch buffer and half cycle access according to AHB clock prescaler 2022-05-12 09:09:39 +02:00
f4677469f9 stm32/usart: Data length is including parity. To get e.g. 8E1 you need to choose 9 data bits 2022-05-12 09:09:30 +02:00
2a7afe4262 Make usb_serial examples work on windows
Windows shows `error 10` when using CDC ACM on non composite devices.
Workaround is to use IADS:
https://developer.nordicsemi.com/nRF_Connect_SDK/doc/1.9.1/kconfig/CONFIG_CDC_ACM_IAD.html#help
2022-05-12 08:05:13 +02:00
6040517774 Merge #765
765: Implement Output::is_set_low for embassy-rp r=Dirbaio a=danbev

This commit implements a suggestion for the method `is_set_low` which is
currently a `todo`, by reading last value written to `GPIO_OUT`.

Co-authored-by: Daniel Bevenius <daniel.bevenius@gmail.com>
2022-05-11 16:58:18 +00:00
0bb428dcc0 squash! Implement Output::is_set_low for embassy-rp
Add check for the bit of the current pin.
2022-05-11 18:33:13 +02:00