Joshua Salzedo
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e2719aba10
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Further extend the dma channel trait
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2021-12-07 21:43:47 +01:00 |
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Joshua Salzedo
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93e047ede2
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cargo fmt
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2021-12-07 21:43:47 +01:00 |
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Joshua Salzedo
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3411039cb9
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Implement extended Channel trait to bdma.rs
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2021-12-07 21:43:47 +01:00 |
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Dario Nieuwenhuis
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ead987245d
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embassy: Refactor module structure to remove kitchen-sink util.
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2021-09-11 02:35:35 +02:00 |
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Thales Fragoso
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c7ae2d2a3a
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stm32: Add fences to DMA code
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2021-08-10 20:45:41 -03:00 |
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Dario Nieuwenhuis
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9bd34429f3
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stm32: add missing + 'a bounds on trait GATs
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2021-08-04 19:39:54 +02:00 |
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Bob McWhirter
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8759213fcc
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Use new interrupt! table format to /enable/ the IRQs also.
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2021-07-27 13:23:33 -04:00 |
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Bob McWhirter
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b910551c9a
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Generate more rows in the interrupts! table.
Adjust DMA/BDMA to use the new style.
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2021-07-27 12:52:01 -04:00 |
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Dario Nieuwenhuis
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3c7375c6cd
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stm32/bdma: do not clear IF on IRQ handler
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2021-07-24 10:01:11 +02:00 |
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Timo Kröger
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43c4f24207
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STM32 BDMA: Use interrupt flags instead of atomics
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2021-07-24 09:26:07 +02:00 |
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Bob McWhirter
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0d2051243e
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SPIv2 + DMA.
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2021-07-23 13:22:39 -04:00 |
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Bob McWhirter
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4c5a234a3a
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Add a non-minc write() to DMA which takes a count.
Use it from "read-only" SPI.
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2021-07-23 13:22:39 -04:00 |
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Bob McWhirter
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2d3137afc7
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The async move portion of @thalesfragoso's i2c PR.
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2021-07-20 11:38:16 -04:00 |
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Thales Fragoso
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aae0431d31
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stm32: Clear possible set flags after disabling DMA
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2021-07-17 16:59:35 -03:00 |
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Dario Nieuwenhuis
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3655048e0f
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stm32/dma: add MuxChannel trait to distinguish DMAMUX1 and DMAMUX2 channels.
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2021-07-17 07:54:16 +02:00 |
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Dario Nieuwenhuis
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54b5012c56
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stm32/dma: update codegen+macrotables for new stm32-data
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2021-07-17 07:35:59 +02:00 |
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Bob McWhirter
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0119ea809d
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Get DMA on H7 working, add usart_dma example for H7.
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2021-07-16 14:41:20 -04:00 |
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Dario Nieuwenhuis
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ae948415a7
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stm32/dma: disable after finishing
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2021-07-16 14:41:20 -04:00 |
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Dario Nieuwenhuis
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63a0e188ea
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stm32/dma: fix h7 impls
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2021-07-16 14:41:20 -04:00 |
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Dario Nieuwenhuis
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3d1391ef2d
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stm32/dma: impl all variants
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2021-07-16 14:41:20 -04:00 |
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