936: Add split() method to BufferedUarte in embassy-nrf r=ZoeyR a=ZoeyR
I haven't completed testing this yet. I'm creating this PR early so that I can get corrected if I went way off course.
This PR adds a `split()` method to `BufferedUarte` as discussed on matrix.
Co-authored-by: Zoey Riordan <zoey@dos.cafe>
938: Do not use cfg_if for embedded-hal-async feature gates. r=Dirbaio a=Dirbaio
Old code used `cfg_if!` because rustc still parses code inside disabled cfg's, and Rust stable at that time couldn't parse the new GAT where-clause location. This is not the case anymore.
bors r+
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
Old code used `cfg_if!` because rustc still parses code inside disabled cfg's, and Rust stable at that time couldn't parse the new GAT where-clause location. This is not the case anymore.
928: Ensure that the sampling is stopped r=Dirbaio a=huntc
Ensures that nRF saadc sampling is stopped and is awaited prior to exiting the two sampling methods. Not doing so causes a potential power drain and the potential for dropped buffer writes when having finished continuous sampling.
Co-authored-by: huntc <huntchr@gmail.com>
* `MSIRGSEL = 1` was required for MSI accept the updated MSI range
* Reorder enable and clock switching to properly handle the jump from
the default 4MHz MSI to a higher MSI freuquency
Call `config()` only once at construction not with every RX and TX operation.
The Lora-E5 only supports HP mode, use that instead.
The nucleo board supports both HP and LP and should continue to work.
The Seeed Studio Lora-E5 module only has two control pins.
With the `RadioSwitch` trait the user can implement any method required
by the module/board to control the TX/RX direction of the radio frontend.
* Interrupt handler only triggers a waker:
Do the actual interrupt processing which involves SUBGHZ SPI coms in the task.
* Do not require a static state for the constructor.
* Remove unsafe from construcor.
913: (embassy-rp): Add DMA implementation r=Dirbaio a=MathiasKoch
This PR adds everything necessary to do peripheral to memory DMA & memory to memory DMA operations.
It also adds async UART read & write, powered by DMA
Co-authored-by: Mathias <mk@blackbird.online>
Ensures that nRF saadc sampling is stopped and is awaited prior to exiting the two sampling methods. Not doing so causes a potential power drain and the potential for dropped buffer writes when having finished continuous sampling.
