Commit Graph

6467 Commits

Author SHA1 Message Date
Rasmus Melchior Jacobsen
c02759ad91 Fix unused errors 2023-05-25 13:59:32 +02:00
Rasmus Melchior Jacobsen
8b1eaf00a0 Simplify SR->Result 2023-05-25 13:54:40 +02:00
Rasmus Melchior Jacobsen
baf1c2efbe Align with new bind_interrupt 2023-05-25 13:42:42 +02:00
Rasmus Melchior Jacobsen
cd8198037f Actually transition to dual bank mode - key was required 2023-05-25 13:08:40 +02:00
Rasmus Melchior Jacobsen
e65ff85b88 Default to Async mode 2023-05-25 13:04:48 +02:00
Rasmus Melchior Jacobsen
9370973846 Remove TryLockError, 2023-05-25 13:04:48 +02:00
Rasmus Melchior Jacobsen
8b13a7b338 Align examples 2023-05-25 13:04:48 +02:00
Rasmus Melchior Jacobsen
dfd5603171 Let FlashLayout and FlashRegion depends on a Blocking/Async mode generic 2023-05-25 13:04:48 +02:00
Rasmus Melchior Jacobsen
966f0abf48 Run format with nightly 2023-05-25 13:04:48 +02:00
Rasmus Melchior Jacobsen
1329a387e0 Add more missing nightly guards 2023-05-25 13:04:47 +02:00
Rasmus Melchior Jacobsen
6804b6c0b4 Fix unused get_sector and ensure_sector_aligned 2023-05-25 13:04:47 +02:00
Rasmus Melchior Jacobsen
ff3a70ed9d Add missing nightly guards 2023-05-25 13:04:47 +02:00
Rasmus Melchior Jacobsen
0a26870d36 Align examples 2023-05-25 13:04:47 +02:00
Rasmus Melchior Jacobsen
b2775fc90c stm32: Add async flash write/erase to f4 2023-05-25 13:04:47 +02:00
Dario Nieuwenhuis
6efcc9acaa
Merge pull request #1483 from embassy-rs/remove-oidc
ci: replace openid connect with static secret.
2023-05-25 04:25:43 +02:00
Dario Nieuwenhuis
2a589b7904 ci: replace openid connect with static secret.
The oidc token is only valid for 5min, builds are starting to fail because HIL tests
take more than 5 min and we only obtain it once at start.

Instead of fixing it, let's remove it. My hope for OIDC was to allow running
HIL tests on PRs from forks if the author is in a list of trusted users.
However GHA simply doesn't give the ID token to PRs from forks. 🤷
Same limitation as with static tokens. So it's useless complexity, let's kill it.
2023-05-25 03:54:49 +02:00
bors[bot]
5f10eadb8d
Merge #1475 #1478 #1482
1475: Add YieldingAsync adapter r=Dirbaio a=rmja

This PR calls `yield_now()` for long blocking `NorFlash` read and erase operations.
The motivation for this change is to allow for other tasks on the same executor to get something done between these long running operations, for example a task that feeds a watchdog. This will allow the watchdog to have a timer relative to e.g. one sector erase, instead of all sector erase.

1478: stm32: Minor fixes in flash regions for F4 dual bank layout r=Dirbaio a=rmja

This PR has the following fixes:
* Ensure that `FlashRegion` instances can only be created within the embassy-stm32 crate.
* Remove `Drop` trait for `AltFlashLayout`, as it is hard to use, as one cannot take the individual regions out from the struct. Instead of going back to single bank mode on `Drop`, we instead transition to single bank mode when calling `Flash::into_regions()`.
* Add missing `otp_region` to the dual bank layout and implement `NorFlash` for the alternate regions.

1482: Add ConcatFlash utility r=Dirbaio a=rmja

This PR adds a `ConcatFlash` utility that can be used to concatenate two `NorFlash` flashes. This is especially useful when concatenating multiple flash regions with unequal erase size.


Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
2023-05-25 01:05:32 +00:00
bors[bot]
224faccd4c
Merge #1340 #1474
1340: Add I2S for f4 r=Dirbaio a=xoviat

This is only for f4, but it puts us equal to or ahead of the standard rust hal.

1474: stm32: Fix watchdog timeout computation r=Dirbaio a=rmja



Co-authored-by: xoviat <xoviat@users.noreply.github.com>
Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
2023-05-25 00:42:10 +00:00
bors[bot]
ce1078994d
Merge #1479
1479: Move stm32 to bind_interrupts r=xoviat a=xoviat



Co-authored-by: xoviat <xoviat@users.noreply.github.com>
2023-05-24 23:47:35 +00:00
xoviat
b6ba1ea53a stm32: move lora to bind_interrupts 2023-05-24 18:09:04 -05:00
xoviat
316be179af stm32: move to bind_interrupts
disable lora functionality for now
2023-05-24 17:29:56 -05:00
Rasmus Melchior Jacobsen
e785e1bc22 Add ConcatFlash utility 2023-05-24 14:40:34 +02:00
Dario Nieuwenhuis
3cc0ec654a
Merge pull request #83 from papyDoctor/master
Update examples in README.md
2023-05-24 11:41:03 +00:00
Olivier Monnom
a19f8c32ff
Update examples in README.md 2023-05-24 09:22:05 +02:00
Rasmus Melchior Jacobsen
87acf5f50f Add missing set_default_layout() in "other" family 2023-05-23 23:01:55 +02:00
Rasmus Melchior Jacobsen
14e3e72b0f Add missing implementations for f4 alternate regions 2023-05-23 22:51:26 +02:00
Rasmus Melchior Jacobsen
faf506b300 Remove Drop for AltFlashLayout 2023-05-23 22:50:41 +02:00
Rasmus Melchior Jacobsen
879c621394 Ensure FlashRegion can only be created within this crate 2023-05-23 22:49:27 +02:00
bors[bot]
627d7f66ef
Merge #1477
1477: embassy-embedded-hal: Add i2c transaction to I2cDevice r=Dirbaio a=CBJamo

Not sure why this was a todo before, but this seems to be working fine in my limited testing.

Co-authored-by: Caleb Jamison <caleb@hellbender.com>
2023-05-23 09:20:44 +00:00
Caleb Jamison
3ad52f837d Remove debug 2023-05-22 21:31:00 -04:00
Caleb Jamison
49eaf000b8 Add i2c transaction 2023-05-22 21:26:03 -04:00
bors[bot]
1fdde8f03f
Merge #1457
1457: TL Mbox read and write for stm32wb r=xoviat a=OueslatiGhaith

Hello,

This pull request is related to #1397 and #1401, inspired by #24, built upon the work done in #1405 and #1424, and was tested on an stm32wb55rg.

This pull request aims to add read and write functionality to the TL mailbox for stm32wb microcontrollers

Co-authored-by: goueslati <ghaith.oueslati@habemus.com>
Co-authored-by: xoviat <xoviat@users.noreply.github.com>
2023-05-23 01:15:22 +00:00
xoviat
64092169e3 stm32/ipcc: disable test 2023-05-22 20:14:37 -05:00
Rasmus Melchior Jacobsen
187551f914 Move module documentation 2023-05-22 16:55:18 +02:00
Rasmus Melchior Jacobsen
cd1bf31fed Add YieldingAsync adapter 2023-05-22 16:48:31 +02:00
Rasmus Melchior Jacobsen
d54eb1107e Yield between BlockingAsync NorFlash write and erase operations 2023-05-22 15:57:20 +02:00
Rasmus Melchior Jacobsen
e9121cba2c stm32: Fix watchdog timeout computation 2023-05-22 14:22:27 +02:00
goueslati
059ab358a5 stm32/ipcc: uncomment shci init cmd 2023-05-22 11:13:22 +01:00
bors[bot]
ab7d129e15
Merge #1473
1473: Protect default implementations for FirmwareUpdater and BootLoader r=lulf a=rmja

It seems as if the arm compiler can does not care about whether the bootloader symbols are undefined if the default() function is never used. The x64 compiler does care however, so this change ensures that we can instantiate the types from tests.

Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
2023-05-22 09:52:56 +00:00
goueslati
12720737e1 stm32/ipcc: fix incorrect example 2023-05-22 10:52:05 +01:00
Rasmus Melchior Jacobsen
18c62aa5b4 Protect default implementations for FirmwareUpdater and BootLoader
It seems as if the arm compiler can does not care about whether the bootloader symbols are undefined if the default() function is never used. The x64 compiler does care however, so this change ensures that we can instantiate the types from tests.
2023-05-22 11:32:39 +02:00
xoviat
d1dfaa1905 stm32/ipcc: fix hil test 2023-05-21 20:18:26 -05:00
xoviat
1f65a4eb6f stm32/ipcc: enable test 2023-05-21 18:40:29 -05:00
xoviat
eb09d7d671 stm32/ipcc: update doc 2023-05-21 18:39:13 -05:00
xoviat
7f702fd6f1 stm32/ipcc: fix warnings 2023-05-20 11:29:53 -05:00
xoviat
383bef1711 stm32/ipcc: naming 2023-05-20 10:24:26 -05:00
xoviat
5e86188c25 stm32/ipcc: cleanup naming 2023-05-20 10:24:13 -05:00
xoviat
661b1f3373 stm32/ipcc: remove constrain 2023-05-20 10:23:57 -05:00
bors[bot]
d55b9bc6e2
Merge #1440
1440: rp: Pin fix, improve fifo handling r=Dirbaio a=CBJamo

Went to actually use this code and found two issues:
* The config for the pins got dropped in the shuffle. 
* I found that when using more than one ws2812, only the first would get data. I'm pretty sure the data was shifted out before the task got back to push the next word. So now the fifo gets filled, then we wait.

Co-authored-by: Caleb Jamison <caleb@cbjamo.com>
Co-authored-by: Caleb Jamison <caleb@hellbender.com>
2023-05-19 20:53:26 +00:00
Caleb Jamison
1ebb742fbf Switch to DMA, use new clocks, don't take ownership of pio common 2023-05-19 16:48:47 -04:00