Commit Graph

4364 Commits

Author SHA1 Message Date
Dario Nieuwenhuis
2d65373f63 Remove unused feature(type_alias_impl_trait). 2023-05-14 23:44:53 +02:00
bors[bot]
ae4827587c
Merge #1454
1454: stm32f0 flash implementation r=Dirbaio a=jp99

i've copied and modified the f3 implementation and it seems to be working.


Co-authored-by: Jaap Prickartz <jaap@tetra.nl>
2023-05-14 21:39:55 +00:00
bors[bot]
cdd326284a
Merge #1453
1453: stm32 uart: Fix error flag handling for blocking operations r=Dirbaio a=timokroeger

Clear and report the error flags one by one and pop the data byte only after all error flags were handled.

For v1/v2 we emulate the v3/v4 behaviour by buffering the status register because a read to the data register clears all flags at once which means we might loose all but the first error.

Only tested on stm32f3 discovery board with loopback. Let‘s see what CI says for the other families.
Fixes #1452 

Co-authored-by: Timo Kröger <timokroeger93@gmail.com>
2023-05-14 20:20:45 +00:00
Timo Kröger
3e9d5978c0 stm32 uart: Add a test for blocking RX overflow 2023-05-14 22:03:06 +02:00
Jaap Prickartz
ec7a4fd9cc stm32f0 flash implementation 2023-05-14 21:57:31 +02:00
Timo Kröger
977a7906e4 stm32 uart: Fix error flag handling for blocking operations
Clear and report the error flags one by one and pop the data byte only
after all error flags were handled.

For v1/v2 we emulate the v3/v4 behaviour by buffering the status
register because a read to the data register clears all flags at once
which means we might loose all but the first error.
2023-05-14 21:10:37 +02:00
Dániel Buga
5fe36b6bb0 Work around xtensa deadlock, take 2 2023-05-13 15:04:02 +02:00
bors[bot]
82f7e104d9
Merge #1448
1448: rp: don't use SetConfig trait in PWM and PIO. r=Dirbaio a=Dirbaio

It was intended to allow changing baudrate on shared spi/i2c. There's no advantage in using it for PWM or PIO, and makes it less usable because you have to have `embassy-embedded-hal` as a dep to use it.

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-05-13 00:14:50 +00:00
Dario Nieuwenhuis
2fcdfc4876 rp: don't use SetConfig trait in PWM and PIO.
It was intended to allow changing baudrate on shared spi/i2c. There's no
advantage in using it for PWM or PIO, and makes it less usable because you have to
have `embassy-embedded-hal` as a dep to use it.
2023-05-13 02:13:26 +02:00
bors[bot]
dec75474d5
Merge #1447
1447: rp/watchdog: fix overflow if period is longer than 4294 seconds. r=Dirbaio a=Dirbaio

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-05-12 22:33:59 +00:00
Dario Nieuwenhuis
3edd81a94e rp/watchdog: fix overflow if period is longer than 4294 seconds. 2023-05-13 00:33:00 +02:00
goueslati
3810fe6a20 tl_mbox: added zigee, lld tests and ble lld tables to ref table 2023-05-12 10:26:46 +01:00
bors[bot]
7f96359804
Merge #1424
1424: add TL maibox for stm32wb r=xoviat a=OueslatiGhaith

Hello,

This pull request is related to #1397 and #1401, inspired by #24, build upon the work done in #1405, and was tested on an stm32wb55rg.

This pull request aims to add the transport layer mailbox for stm32wb microcontrollers. For now it's only capable of initializing it and getting the firmware information

Co-authored-by: goueslati <ghaith.oueslati@habemus.com>
Co-authored-by: Ghaith Oueslati <73850124+OueslatiGhaith@users.noreply.github.com>
Co-authored-by: xoviat <xoviat@users.noreply.github.com>
2023-05-11 22:48:55 +00:00
xoviat
bf45b1d83d fix memory.x 2023-05-11 17:23:18 -05:00
xoviat
d7262f9849 rustfmt 2023-05-11 16:53:55 -05:00
xoviat
8a620fd59c stm32/ble: fix tests and add instructions to run example 2023-05-11 16:45:42 -05:00
bors[bot]
e179e7cf85
Merge #1436
1436: rp: Clock configuration r=CBJamo a=CBJamo

Draft of a more complete clock config for the 2040.

I also extended and made public the clk_<name>_freq functions. I know at least the ws2812 pio example would like to get the sys clock at runtime rather than just using a constant. I suspect most pio-based peripherals will want access to the clocks.

Open questions:

1. Best way to handle the 3 external clock frequencies. I think the XIN (aka crystal) freq should just be set by the init function then never changed, though if it's an external clock that could change? I'm not sure anyone would ever want to do that but maybe it should be handled just in case? The other two should probably be set by the application.
2. Better estimation of ROSC frequency. Right now it's really just a lookup table of the speed from the single sample I did this testing on, and only uses the frequency range and div, drive strength is ignored.
3. Probably some kind of warning should be generated if the random bit from the rosc won't be useful, not sure how to do that.
4. Should clocks only be allowed to be configured at init, or should they be modifiable at runtime? For example, switching the RTC to a clock in pin when a pps source is available.

Bonus feature to support clock output. I only implemented the bare minimum, and only for gpout0. I'm sure there's a clean way with macros to impl all 4 without just copy/paste, but I haven't learned macros yet.

Co-authored-by: Caleb Jamison <caleb@cbjamo.com>
2023-05-09 21:56:43 +00:00
Caleb Jamison
9d971e5b15
Merge branch 'master' into master 2023-05-09 17:55:27 -04:00
Caleb Jamison
5cfe1a1fb4 Dirbaio comments round 2 2023-05-09 17:45:24 -04:00
bors[bot]
856b944eaf
Merge #1439
1439: rp: use rp2040-boot2 to provide the boot2 blob r=Dirbaio a=pennae

we're currently shipping an old boot2 that runs the flash at half speed. use the more recent version instead, and allow user to choose between the different supported boot2 versions for different flash chips if they need that.

Co-authored-by: pennae <github@quasiparticle.net>
2023-05-09 16:39:13 +00:00
pennae
0e3cd87a32 rp: use rp2040-boot2 to provide the boot2 blob
we're currently shipping an old boot2 that runs the flash at half speed.
use the more recent version instead, and allow user to choose between
the different supported boot2 versions for different flash chips if they
need that.
2023-05-09 18:36:17 +02:00
Caleb Jamison
6bea078487 Remove patches, bump rp-pac version 2023-05-09 12:20:23 -04:00
Caleb Jamison
5015c845c5 Improve gpout example, clk_gpout_freq 2023-05-09 12:10:24 -04:00
Caleb Jamison
c1eaad41f3 Gpout cleanup, basic Gpin support
Requires rp-pac #3
2023-05-09 11:46:25 -04:00
Caleb Jamison
14eecf2fc4 Address Dirbaio comments
Gpout still incomplete.
2023-05-08 19:13:50 -04:00
bors[bot]
0b4b87e344
Merge #1437 #1438
1437: Fix some typos r=Dirbaio a=striezel

This pull request fixes some typos, no functional changes intended.

1438: Update GitHub Actions CI r=Dirbaio a=striezel

The following updates are performed:
* update [`actions/cache`](https://github.com/actions/cache) to v3
* update [`actions/checkout`](https://github.com/actions/checkout) to v3

Still using the outdated actions will generate several warnings in CI runs, for example in https://github.com/embassy-rs/embassy/actions/runs/4917900672:

> Node.js 12 actions are deprecated. Please update the following actions to use Node.js 16: actions/checkout@v2, actions/cache@v2. For more information see: https://github.blog/changelog/2022-09-22-github-actions-all-actions-will-begin-running-on-node16-instead-of-node12/.

The PR will get rid of those warnings.

Co-authored-by: Dirk Stolle <striezel-dev@web.de>
2023-05-08 21:38:30 +00:00
Dirk Stolle
5df263db38 Update GitHub Actions CI
The following updates are performed:
* update actions/cache to v3
* update actions/checkout to v3
2023-05-08 23:28:01 +02:00
Dirk Stolle
0584312ef0 Fix some typos 2023-05-08 23:25:01 +02:00
bors[bot]
d0703f83db
Merge #1435
1435: Added example for multi priority executors rp2040 r=Dirbaio a=fakusb

I added an example for multiple priorities of tasks on rp2040 by adjusting [examples/nrf52840/src/bin/multiprio.rs](https://github.com/embassy-rs/embassy/blob/master/examples/nrf52840/src/bin/multiprio.rs) .

This needs https://github.com/embassy-rs/rp-pac/pull/2 , and this commit also adds the 6 new interrupt handlers for software interrupts to embassy-rs.

We might need to change the git path for rp-pac in [embassy-rp/Cargo.toml](https://github.com/embassy-rs/embassy/compare/master...fakusb:rp2040-multiprio-executor?expand=1#diff-47463ea358745927ecdb686f52feab816fde5d402a9628a136c116f34a802ab0)

Closes #1413

Co-authored-by: Fabian Kunze <fkunze@fkunze.de>
2023-05-08 16:59:07 +00:00
Fabian Kunze
2910b09cba bumped rp-pac version 2023-05-08 17:55:53 +02:00
Caleb Jamison
59132514cf Add missing functions, Cleanup, Gpout example 2023-05-08 09:45:54 -04:00
Caleb Jamison
1a96eae22c rp clock configuration 2023-05-08 09:45:54 -04:00
bors[bot]
79c60f4a7d
Merge #1434
1434: rp pio IV (the voyage home) r=Dirbaio a=pennae

this should hopefully be the last entry in this series. after this we'll have a reasonably safe interface to pio, both for configuration and at runtime. pio now looks very much like the other peripherals (though not exactly, seeing how state machines can't be constructed from a config but only have it applied to them later). the generated code for `StateMachine::set_config` is still larger than we'd like (almost 300 bytes at Oz), but it's a great step up in safety from the previous interface at approximately the same code space cost.

Co-authored-by: pennae <github@quasiparticle.net>
2023-05-08 09:17:51 +00:00
Fabian Kunze
fb2d5b484a changed relative cargo.toml dependency to github revision 2023-05-07 01:24:59 +02:00
Fabian Kunze
87795cbca8 added example multi priority executors rp2040 2023-05-07 01:00:13 +02:00
pennae
db9b8eb88f rp/pio: make sure gpio() asserts are compiled out
we'll have to touch pio one way or other if the number of gpio pins ever
increases. may as well make sure an assert never fires until that happens.
2023-05-06 21:14:00 +02:00
pennae
b38d496d51 rp/pio: allow wrap-around program loading
execution wraps around after the end of instruction memory and wrapping
works with this, so we may as well allow program loading across this
boundary. could be useful for reusing chunks of instruction memory.
2023-05-06 21:08:20 +02:00
pennae
374c7513f9 rp/pio: mark exec_instr as unsafe
because it most definitely is.
2023-05-06 17:24:06 +02:00
pennae
bdcea84ca1 rp/pio: add sm batch operations
sometimes state machines need to be started, restarted, or synchronized
at exactly the same time. the current interface does not allow this but
the hardware does, so let's expose that.
2023-05-06 17:23:41 +02:00
pennae
8e4d65e163 rp/pio: configure state machines with Config struct
the many individual sets aren't very efficient, and almost no checks
were done to ensure that the configuration written to the hardware was
actually valid. this adresses both of these.
2023-05-06 17:23:41 +02:00
pennae
2873cb93ee rp/pio: mark pio_instr_util unsafe
none of these are safe. the x/y functions mangle the fifos, the set
functions require the state machine to be stopped to be in any way safe,
the out functions do both of those things at once. only the jump
instruction is marginally safe, but running this on an active program is
bound to cause problems.
2023-05-06 11:52:25 +02:00
pennae
37b460637d rp/pio: add set-pin-{values,dirs} convenience functions
these are needed a lot during state machine setup, it makes sense to
provide convenience functions for them.
2023-05-06 11:52:25 +02:00
pennae
41ec4170a5 rp/pio: add load_program, use_program
programs contain information we could pull from them directly and use to
validate other configuration of the state machine instead of asking the
user to pull them out and hand them to us bit by bit. unfortunately
programs do not specify how many in or out bits they use, so we can only
handle side-set and wrapping jumps like this. it's still something though.
2023-05-06 11:44:04 +02:00
bors[bot]
a9c7263ba0
Merge #1432
1432: Support PLLXTPRE switch. r=Dirbaio a=MrOscarLoplate

See figure 2. Clock tree page 12 DS5319 Rev 18
https://www.st.com/resource/en/datasheet/stm32f103cb.pdf

Co-authored-by: Marco Pastrello <marco.pastrello@gmail.com>
2023-05-05 17:09:26 +00:00
pennae
5f7ef8bed0 rp/pio: only clear diag bits if they're set
otherwise we may lose a bit being raised after it was read, but before
it was cleared.
2023-05-05 19:08:16 +02:00
pennae
ed843b519b rp/pio: tighten variance of particle structs
all of these exist in 1:1 correspondence to their parent hal objects, so
let's make all of their lifetimes invariant.
2023-05-05 19:08:16 +02:00
pennae
09f078a1cc rp/pio: remove critical section in IrqFuture::poll
there's nothing this critical section protects against. both read and
write-to-clear are atomic and don't interfere with other irq futures,
only potentially with setting/clearing an irq flag from an arm core.
neither have ever been synchronized, and both have the same observable
effects under atomic writes and critical sections. (for both setting and
clearing an irq flag observable differences could only happen if the
set/clear happened after the poll read, but before the write. if it's a
clear we observe the same effects as sequencing the clear entirely after
the poll, and if it's a set we observe the same effects as sequencing
the set entirely before the poll)
2023-05-05 19:08:16 +02:00
pennae
8ebe6e5f20 rp/pio: drop Pio prefix from almost all names
it's only any good for PioPin because there it follows a pattern of gpio
pin alternate functions being named like that, everything else can just
as well be referred to as `pio::Thing`
2023-05-05 19:08:16 +02:00
Marco Pastrello
db2bc8783e Improve readability 2023-05-05 19:04:58 +02:00
Marco Pastrello
c37f86ff1c removes unecessary braces 2023-05-05 00:12:32 +02:00