Joshua Salzedo
c892289b2c
Actually export CRC
2021-09-26 17:26:33 -07:00
Joshua Salzedo
24dea91f5a
Fix interface changes
2021-09-26 17:24:48 -07:00
Joshua Salzedo
e18a27eea2
First pass at CRC_V1
2021-09-26 16:46:17 -07:00
Joshua Salzedo
e527892d89
Start work on CRC_v1
2021-09-26 16:29:22 -07:00
Dario Nieuwenhuis
f8d833e0c5
Merge pull request #403 from mryndzionek/af_type
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Small adjustment to 'set_as_af' interface
2021-09-24 20:20:45 +02:00
Mariusz Ryndzionek
e4b37c40c9
Code review request - moving OutputType to mod sealed
2021-09-24 19:56:48 +02:00
Mariusz Ryndzionek
d371298a27
Small adjustment to 'set_as_af' interface
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Small adjustment to 'set_as_af' interface - v2
2021-09-24 18:39:07 +02:00
Vincent Stakenburg
7d6d274d55
Add MSI and PLL clock source for L4
2021-09-24 18:27:39 +02:00
Ulf Lilleengen
b6fc19182b
Add pwr for L1 and update RCC to new reg block
2021-09-23 14:51:16 +02:00
Ulf Lilleengen
9d45018077
Refactor V1 SPI
2021-09-21 14:50:23 +02:00
Ulf Lilleengen
c79485c286
Support for STM32L1
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* Add RCC
* Fix more issues with dash in chip names
* Update stm32-data version
* Add blinky and spi example
2021-09-21 14:50:23 +02:00
Ulf Lilleengen
fb697a2657
Updates
2021-09-15 12:46:20 +02:00
Dario Nieuwenhuis
ead987245d
embassy: Refactor module structure to remove kitchen-sink util.
2021-09-11 02:35:35 +02:00
Adam Greig
14fa6c2760
STM32H7: Ethernet: Disable RA in MAC filtering, fix order of MACA0 register writes.
2021-09-06 23:16:43 +01:00
Bob McWhirter
d4bf78a0c1
Don't set SAF=true, do set RA=true for Ethernet.
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Source-Address-Filtering is not helping the board to receive packets.
For unknown reasons, the Receive-All is required, when in theory
it should not be required. Until we figure it out, follow the
stm32h7xx-hal example of setting RA=true.
2021-09-06 14:21:26 -04:00
Dario Nieuwenhuis
eff8ae9c4d
Merge pull request #381 from lulf/stm32wl55-subghz
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Add HAL for SubGhz peripheral for STM32 WL series
2021-09-06 00:58:42 +02:00
Dario Nieuwenhuis
de016e8456
Remove trait_alias, allow(incomplete_features).
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trait_alias seems unused. no idea why it's there.
2021-09-03 17:00:58 +02:00
Ulf Lilleengen
0f3d278ce3
Temporarily comment unused code
2021-09-02 11:31:38 +02:00
Ulf Lilleengen
4dccda085f
Add missing files for G0
2021-09-02 11:19:54 +02:00
Ulf Lilleengen
f175574bcf
Cargo fmt
2021-09-02 10:43:08 +02:00
Ulf Lilleengen
16aa1d1770
ADd missing file
2021-09-02 10:42:11 +02:00
Ulf Lilleengen
7ad6280e65
Add HAL for SubGhz peripheral for STM32 WL series
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Based on the HAL from stm32wl, the peripheral driver has been
modified to fit into embassy, using the embassy APIs, providing
operation of the radio peripheral.
The initial version does not offer any async APIs, but the example
shows how the radio IRQ can be used to perform async TX of the radio.
2021-09-02 10:39:56 +02:00
Bob McWhirter
37ceae908b
Rename Random impl to Rng.
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Create Random struct providing next_x(range) for all T:Rng.
2021-09-01 09:39:33 -04:00
Bob McWhirter
7fa3b27cac
Move random utils to another trait.
2021-08-30 09:55:29 -04:00
Bob McWhirter
d525f51940
Add a convenience next(range) to Rng.
2021-08-27 16:10:01 -04:00
Dario Nieuwenhuis
e56c6166dc
Merge pull request #373 from embassy-rs/docs
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Time driver improvements, docs.
2021-08-26 23:37:37 +02:00
Bob McWhirter
dc394dd477
Fixes #374 : Ensure Rng's error is defmt-able.
2021-08-26 14:04:12 -04:00
Dario Nieuwenhuis
7c0990ad1e
time: allow storing state inside the driver struct.
2021-08-25 21:06:27 +02:00
Bob McWhirter
4aa52f1b9e
Formatting.
2021-08-24 14:56:45 -04:00
Bob McWhirter
e36ae76e45
Fix blocking-write for SPI.
2021-08-24 14:44:47 -04:00
Ben Gamari
e2f71ffbbd
Add support for STM32G0
2021-08-20 00:15:11 +02:00
Dario Nieuwenhuis
174c51f097
stm32/metapac: check GPIO RCC regs are always found.
2021-08-19 23:59:50 +02:00
Dario Nieuwenhuis
2c992f7010
stm32: move dbgmcu stuff to toplevel config setting, defaulting to true.
2021-08-19 23:50:19 +02:00
Dario Nieuwenhuis
9f51f9a170
stm32/wl: add stub APB3 to get it to build.
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Completely untested.
2021-08-19 22:51:41 +02:00
Dario Nieuwenhuis
637fcdd316
stm32/rcc: update for new version naming
2021-08-19 22:17:45 +02:00
Dario Nieuwenhuis
ec51880e28
stm32/exti: unify all versions into single impl
2021-08-19 22:17:17 +02:00
Timo Kröger
f141b98741
bxcan: Cleanup
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Older families like F1 and F4 have a consistent naming for the CAN
peripherals: CAN when there is only one instance, CAN1/CAN2/CAN2 if
there are multiple instances.
Newer families like L4 and F7 use the name CAN1 even if there is only
one instance. The number of filter banks is incorrect for those.
Affected chips:
* STM32F722
* STM32F723
* STM32F730
* STM32F732
* STM32F733
* STM32L4P5
* STM32L4Q5
* STM32L4R5
* STM32L4R7
* STM32L4R9
* STM32L4S5
* STM32L4S7
* STM32L4S9
* STM32L431
* STM32L432
* STM32L433
* STM32L442
* STM32L443
* STM32L451
* STM32L452
* STM32L462
* STM32L471
* STM32L475
* STM32L476
* STM32L485
* STM32L486
2021-08-18 21:58:50 +02:00
Timo Kröger
191a589820
bxcan: namechange "bxcan_v1" -> "can_bxcan"
2021-08-18 21:58:50 +02:00
Timo Kröger
dc6b7f3cba
bxcan: Disable on drop
2021-08-18 21:58:50 +02:00
Timo Kröger
7c405250a7
CAN support with bxcan crate
2021-08-18 21:58:50 +02:00
Ulf Lilleengen
4df63f5379
Add per-core EXTI support
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* Generate a core index put into the PAC for the peripherals to use as
index into registers.
* Add EXTI v2 which uses CORE_INDEX to index exti registers
2021-08-17 16:22:47 +02:00
Ulf Lilleengen
61409e2fb6
Add example for STM32WL55
2021-08-17 16:22:47 +02:00
Bob McWhirter
a93ed2bed6
Add H7 exti button example using correct EXTI reg block offsets.
2021-08-16 15:15:07 -04:00
Ulf Lilleengen
cbff0398bb
Add IRQ-driven buffered USART implementation for STM32 v2 usart ( #356 )
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* Add IRQ-driven buffered USART implementation for STM32 v2 usart
* Implementation based on nRF UARTE, but simplified to not use DMA to
avoid complex interaction between DMA and USART.
* Implementation of AsyncBufRead and AsyncWrite traits
* Some unit tests to ring buffer
* Update polyfill version
* Update sub module to get usart IRQ fix
2021-08-16 17:16:49 +02:00
Thales Fragoso
c7ae2d2a3a
stm32: Add fences to DMA code
2021-08-10 20:45:41 -03:00
Ben Gamari
40e7176e13
embassy-stm32: Eliminate use of unwrap
2021-08-05 22:40:08 +02:00
Ben Gamari
41aaff95f8
stm32h7: Use unwrap!
2021-08-05 22:39:59 +02:00
Ben Gamari
e44acd0d56
stm32f4: Use unwrap! where possible
2021-08-05 22:39:59 +02:00
Dario Nieuwenhuis
05e50e1f4a
time_driver: use regular fn ptr -> raw ptr casts
2021-08-05 19:19:47 +02:00
Dario Nieuwenhuis
b1d631d639
stm32/time: add Cargo features to choose tim2/tim3
2021-08-05 19:14:09 +02:00
Dario Nieuwenhuis
0ea6a2d890
time: replace dyn clock/alarm with a global Driver trait
2021-08-05 19:14:09 +02:00
Dario Nieuwenhuis
cfa1f61154
Merge pull request #344 from bobmcwhirter/remove_builders
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Remove builders from Config(s) and examples.
2021-08-04 21:32:39 +02:00
Dario Nieuwenhuis
07d4b196f7
Update nightly, remove removed features.
2021-08-04 19:48:14 +02:00
Dario Nieuwenhuis
9bd34429f3
stm32: add missing + 'a bounds on trait GATs
2021-08-04 19:39:54 +02:00
Bob McWhirter
f4971fbb79
Further work sharing config for example and removing duplicated code.
2021-08-04 13:39:02 -04:00
Bob McWhirter
03f15d3a60
Remove builders from Config(s) and examples.
2021-08-04 11:32:39 -04:00
Dario Nieuwenhuis
de77dc11ca
Merge pull request #301 from thalesfragoso/i2cv2-dma
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i2c-v2: Implement write_dma and write_dma_vectored
2021-08-04 12:28:18 +02:00
Dario Nieuwenhuis
5d31dd328f
Merge pull request #341 from lulf/usart-dma-read
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Add uart::Read DMA-based implementation
2021-08-04 11:02:15 +02:00
Ulf Lilleengen
0d02342b2d
Rename bread -> read_blocking
2021-08-04 08:34:30 +02:00
Bob McWhirter
88c11a653c
Formatting fixes.
2021-08-03 14:12:11 -04:00
Bob McWhirter
d7409d63e8
Enhance Rcc configuration to be more fluentish.
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Clean up H7 examples to remove all vegan HALs and PACs.
2021-08-03 13:57:18 -04:00
Ulf Lilleengen
6ff0614cb6
Add uart::Read DMA-based implementation
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* Rename existing read() to bread() (blocking)
2021-08-03 15:31:24 +02:00
Dario Nieuwenhuis
3f28bb6c77
common: Initialize PeripheralMutex state with closure to ensure it's done in-place.
2021-08-02 20:13:41 +02:00
Dario Nieuwenhuis
e238079d7d
Make const the states when able.
2021-08-02 19:59:02 +02:00
Dario Nieuwenhuis
63ac7ac799
Mark news as unsafe due to not being leak-safe.
2021-08-02 19:55:04 +02:00
Dario Nieuwenhuis
af87031d62
hal-common: remove Pin in PeripheralMutex
2021-08-02 19:55:04 +02:00
Bob McWhirter
3a00a1dba7
Undo the pwr-guarding cfg.
2021-08-02 11:34:41 -04:00
Bob McWhirter
f6c5f039c8
Emit a default memory.x alongside device.x from metapac.
2021-08-02 11:23:55 -04:00
Thales Fragoso
64a3ebd183
i2c-v2: Use new interrupts macro
2021-08-01 19:10:42 -03:00
Thales Fragoso
c1bb83d29d
i2c-v2: Deref interrupt enabling in write_dma_internal
2021-08-01 19:10:42 -03:00
Thales Fragoso
6ddc83029a
i2c-v2: Simplify write_dma
2021-08-01 19:10:42 -03:00
Thales Fragoso
362f7efe99
i2c-v2: Implement write_dma and write_dma_vectored
2021-08-01 19:10:42 -03:00
Dario Nieuwenhuis
3835278567
Merge pull request #321 from thalesfragoso/f4-pll
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F4 PLL
2021-07-31 11:08:46 +02:00
Thales Fragoso
21e3acaa00
stm32: Use build.rs to generate a more coarse feature
2021-07-31 02:52:26 -03:00
Thales Fragoso
0421c57bd6
F4: Add PWR configuration to PLL
2021-07-29 18:43:15 -03:00
Thales Fragoso
5cfb9adad8
f4-pll: Add max values per chip
2021-07-29 18:43:15 -03:00
Thales Fragoso
e7714983b3
f4-rcc: Add option to enable debug_wfe and add hello example
2021-07-29 18:43:15 -03:00
Thales Fragoso
5abaf8e9d6
Start working on the F4 PLL
2021-07-29 18:43:13 -03:00
Timo Kröger
9342497132
stm32wl55: Use Dbgmcu::enable_all
2021-07-29 17:38:40 +02:00
Timo Kröger
cad43587e6
stm32l0: Use embassy::main for examples
2021-07-29 17:37:32 +02:00
Timo Kröger
2a4890165d
stm32f0: Enable debug access in low power modes
2021-07-29 15:35:23 +02:00
Dario Nieuwenhuis
7bfb763e09
Rename embassy-extras to embassy-hal-common
2021-07-29 13:44:51 +02:00
Dario Nieuwenhuis
c8a48d726a
Merge pull request #277 from Liamolucko/fix-peripheral-ub
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extras: Fix UB in `Peripheral`
2021-07-29 13:08:30 +02:00
Liam Murphy
d5ba35424d
Replace PeripheralStateUnchecked with register_interrupt_unchecked
2021-07-29 15:11:26 +10:00
Bob McWhirter
8759213fcc
Use new interrupt! table format to /enable/ the IRQs also.
2021-07-27 13:23:33 -04:00
Bob McWhirter
b910551c9a
Generate more rows in the interrupts! table.
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Adjust DMA/BDMA to use the new style.
2021-07-27 12:52:01 -04:00
Liam Murphy
079526559f
Remove critical sections from PeripheralMutex interrupt handler by checking the interrupt's priority on startup.
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Since `PeripheralMutex` is the only way to safely maintain state across interrupts, and it no longer allows setting the interrupt's priority, the priority changing isn't a concern.
This also prevents other causes of UB due to the interrupt being exposed during `with`, and allowing enabling the interrupt and setting its context to a bogus pointer.
2021-07-27 17:28:52 +10:00
Timo Kröger
06fb2a7a80
Enable SYSCFG clock in exti::init()
2021-07-24 11:13:49 +02:00
Dario Nieuwenhuis
3c7375c6cd
stm32/bdma: do not clear IF on IRQ handler
2021-07-24 10:01:11 +02:00
Timo Kröger
43c4f24207
STM32 BDMA: Use interrupt flags instead of atomics
2021-07-24 09:26:07 +02:00
Timo Kröger
5a4a5ce334
STM32 DMA: Use interrupt flags instead of atomics
2021-07-24 09:26:07 +02:00
Bob McWhirter
83f63890e5
Actually take a &mut of that read slice.
2021-07-23 13:22:39 -04:00
Bob McWhirter
473a83a937
Adjust how we deal with read/write being different length.
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Including some docs about it.
Removing the Rx-enablement for write-only operations.
2021-07-23 13:22:39 -04:00
Bob McWhirter
f1a3e0e05d
As before, EVERY DANG TIME.
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It'll be sweet with intellij-rust-plugin works better.
2021-07-23 13:22:39 -04:00
Bob McWhirter
b07325b476
Enable DMA for SPIv1 on F4's etc.
2021-07-23 13:22:39 -04:00
Bob McWhirter
8ab82191b7
Every dang time.
2021-07-23 13:22:39 -04:00
Bob McWhirter
a1dac21bdf
Make SPIv3 work with DMA.
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Add both DMA and non-DMA example to H7.
2021-07-23 13:22:39 -04:00
Bob McWhirter
6dbe049468
Add back in the other versions of SPI.
2021-07-23 13:22:39 -04:00
Bob McWhirter
0d2051243e
SPIv2 + DMA.
2021-07-23 13:22:39 -04:00
Bob McWhirter
1a03f00b56
Wire up peripheral DMA channels for SPI.
2021-07-23 13:22:39 -04:00
