1128: Add missing SPI pins r=Dirbaio a=pferreir
The SPI definitions lack the pins which are not accessible on the pico (but are so e.g. on the stamp).
Co-authored-by: Pedro Ferreira <pedro@dete.st>
1124: Fix two SPI bugs for stm32 r=Dirbaio a=rmja
This PR fixes two bugs:
* It fixes#1095 by ensuring that pin speed is VeryHigh for all spi versions. I am on stm32f429 which seems to be spi_v1, and it also needs the VeryHigh pin speed. Otherwise bit errors on the "last bit in every byte" can happen.
* It also fixes a lifetime bug for the tx buffer when sending "write_repeated". The issue can be seen when doing spi.write where the clock byte changes during a transmission because the buffer handled to the dma must live throughout the entire transfer.
Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
1121: Add examples for stm32f0 r=lulf a=imrank03
Hello `@lulf,`
I added some more examples to stm32f0 and tested on hardware.
With love,
Imran
Co-authored-by: @imrank03 <immu0396@gmail.com>
1119: add convert_to_celsius function in the adc module r=lulf a=overheat
modify RP2040 adc example to get inside biased bipolar diode voltage,
then convert this temperature sensor data into Celsius degree,
according to chapter 4.9.5. Temperature Sensor in RP2040 datasheet.
Co-authored-by: Aaron Tsui <aaron.tsui@outlook.com>
modify RP2040 adc example to get inside biased bipolar diode voltage,
then convert this temperature sensor data into Celsius degree,
according to chapter 4.9.5. Temperature Sensor in RP2040 datasheet.
1114: nrf/uart: do not error on zero length transfers. r=Dirbaio a=Dirbaio
It's a perfectly fine thing to do, should be just a noop. Erroring is really annoying when you're writing a payload to uart that might be zero-length or not.
bors r+
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
It's a perfectly fine thing to do, should be just a noop. Erroring is
really annoying when you're writing a payload to uart that might
be zero-length or not.
The eth code is always built and available, but has no own API (other
than the embassy-net Device impl) to rx/tx packets. We could add this
API in the future, so the feature only means "embassy-net support".
The pool was prone to deadlocks, especially due to having a single pool
for rx+tx. If the pool got full with rx'd packets it would deadlock because
processing a rx packet requires doing another allocation on the pool, for
the possibly tx'd response, before deallocating the rx'd packet.
This also allows Device impls to allocate the packet memory in a particular
RAM kind, if needed for example to do DMA.
The `Device` trait is now token-based, like smoltcp's. In the end, this
is better because it allows callers to manage memory however they want (including
with a pool if they want to).
1105: embassy-rp: Add multicore support r=Dirbaio a=kalkyl
This PR adds multicore support + critical-section impl using hardware spinlocks.
Based on the rp2040-hal implementation.
Co-authored-by: kalkyl <henrik.alser@me.com>
Co-authored-by: Henrik Alsér <henrik.alser@me.com>
