Commit Graph

2905 Commits

Author SHA1 Message Date
Dario Nieuwenhuis
ade44e91c4 stm32/exti: add wait_for_high, wait_for_low. 2022-01-19 17:59:55 +01:00
Dario Nieuwenhuis
b526addf7b stm32/exti: expose all functionality as inherent methods. 2022-01-19 17:59:55 +01:00
Dario Nieuwenhuis
58fc64722c stm32/gpio: expose all functionality as inherent methods. 2022-01-19 17:59:55 +01:00
Dario Nieuwenhuis
52e156b429 stm32: use critical_section instead of cortex_m::interrupt 2022-01-19 17:59:55 +01:00
Dario Nieuwenhuis
ecda57dff1 stm32: remove unused .pep8 file 2022-01-19 17:59:55 +01:00
bors[bot]
071b034a5d
Merge #582
582: Make advanced timer trait not require general purpose timer trait as … r=Dirbaio a=matoushybl

…the timers are too different.

When developing pwm driver, I originally used T: GeneralPurpose16bitTimer as it could support both GP timers and advanced timer, but advanced timer requires further modifications in registers accessible only in it (BDTR - bit AOE).

This PR makes advanced timers depend on Basic16bitTimer instead, which should hopefully improve type safety and allow for better timer drivers that can distinguish between advanced timers and general purpose ones.

Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2022-01-19 16:45:56 +00:00
bors[bot]
8fb11bcd9b
Merge #583
583: misc nrf fixes r=Dirbaio a=Dirbaio



Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-01-19 16:32:30 +00:00
Dario Nieuwenhuis
b640c72092 nrf: return ptr in slice_ptr_parts 2022-01-19 17:31:32 +01:00
Dario Nieuwenhuis
a607cf6142 nrf: build with unstable-traits in ci 2022-01-19 17:31:24 +01:00
Matous Hybl
4988dfe981 Make advanced timer trait not require general purpose timer trait as the timers are too different. 2022-01-18 11:18:54 +01:00
bors[bot]
ddf8c99a93
Merge #579
579: embassy-stm32: L1 family RCC fixes r=Dirbaio a=unrelentingtech



Co-authored-by: Greg V <greg@unrelenting.technology>
2022-01-14 20:07:25 +00:00
Greg V
9fb2b5fa86 examples/stm32l1: remove memory.x, use the crate-provided one 2022-01-14 22:59:57 +03:00
Greg V
9fcc207629 stm32l1/rcc: fix clock frequency assertion
It was comparing a number in Hz (!) to "32" (MHz).
embassy-stm32's units don't work like those used by stm32-hal :/
2022-01-14 22:59:57 +03:00
Greg V
456b56d4fd stm32l1/rcc: set required flash bits for high frequencies
As is done for lots of other families
2022-01-14 22:59:57 +03:00
bors[bot]
2310003f39
Merge #552
552: embassy-nrf: migrate to embedded-hal 1.0, embedded-hal-async r=Dirbaio a=Dirbaio



Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-01-14 18:39:27 +00:00
bors[bot]
8f81a6548f
Merge #574
574: Add the possibility to reconfigure Spi mode and bit order configurati… r=matoushybl a=matoushybl

…on on the fly.

I have not tested these changes. I am also not sure if the peripheral should be disabled when changing these settings. What do you think `@Dirbaio` ?

Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2022-01-14 12:07:57 +00:00
bors[bot]
516ad6d8fd
Merge #578
578: Fix typo in defuse doc comment r=Dirbaio a=danbev



Co-authored-by: Daniel Bevenius <daniel.bevenius@gmail.com>
2022-01-14 11:53:59 +00:00
Matous Hybl
bc0af38599 Update stm32-data. 2022-01-14 12:50:58 +01:00
Matous Hybl
66e46d8012 Add the possibility to reconfigure Spi mode and bit order configuration on the fly. 2022-01-14 12:50:58 +01:00
Daniel Bevenius
cdb4f70646 Fix typo in defuse doc comment 2022-01-14 12:49:37 +01:00
Dario Nieuwenhuis
7997687f3b nrf: impl embedded-hal 1.0 and embedded-hal-async traits. 2022-01-13 23:56:39 +01:00
Dario Nieuwenhuis
6eec3d8acc nrf/rng: expose all functionality as inherent methods. 2022-01-13 23:56:39 +01:00
Dario Nieuwenhuis
df00c83984 nrf/qspi: expose all functionality as inherent methods. 2022-01-13 23:56:39 +01:00
Dario Nieuwenhuis
3e503e7335 nrf/uarte: expose all functionality as inherent methods. 2022-01-13 23:56:39 +01:00
Dario Nieuwenhuis
c432d036c7 nrf/gpiote: expose all functionality as inherent methods. 2022-01-13 23:56:39 +01:00
Dario Nieuwenhuis
3ca01cba8d nrf/gpio: Rename FlexPin to Flex.
FlexPin sounds like it's an owned pin singleton, like AnyPin or NoPin.
2022-01-13 23:56:39 +01:00
Dario Nieuwenhuis
ecb4f8fb00 nrf/twim: expose all functionality as inherent methods. 2022-01-13 23:56:39 +01:00
Dario Nieuwenhuis
a287fef687 nrf/spim: expose all functionality as inherent methods. 2022-01-13 23:56:39 +01:00
Dario Nieuwenhuis
7086642ce4 nrf/spim: share code between blocking+async. 2022-01-13 19:53:12 +01:00
Dario Nieuwenhuis
167af01211 stm32-metapac: remove stm32gbk 2022-01-13 18:22:29 +01:00
bors[bot]
f3b999c8b5
Merge #577
577: embassy/util: Add yield_now() r=Dirbaio a=Dirbaio



Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-01-13 16:44:33 +00:00
bors[bot]
d07f6828ef
Merge #508
508: STM32 timers + pwm improvements r=matoushybl a=matoushybl



Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2022-01-13 16:09:20 +00:00
Matous Hybl
e056bedd55 Port the PWM example to H7, add low-level API example implementing 32-bit PWM. 2022-01-13 16:53:55 +01:00
Matous Hybl
e07df92651 Make RCC accessible using low-level API. 2022-01-13 16:12:45 +01:00
Matous Hybl
16d09f074a Add simple PWM, add PWM pin definitions also accessible from low-level API. 2022-01-13 16:05:54 +01:00
Matous Hybl
a1f7a94c69 Add low level timer API. 2022-01-13 16:05:54 +01:00
Dario Nieuwenhuis
ab24e5db59 embassy/util: Add yield_now() 2022-01-12 16:30:37 +01:00
bors[bot]
0d67ceb066
Merge #576
576: Make exti an optional feature r=Dirbaio a=lulf



Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
2022-01-12 14:05:58 +00:00
Ulf Lilleengen
2bc105803a Make exti an optional feature
* Add embassy-stm32 build with exti
* Add exti to examples
2022-01-12 14:28:10 +01:00
Dario Nieuwenhuis
e7668a86bd
Merge pull request #573 from danbev/runtime-doc-typo2
Fix 'the the' typo and add a missing 'it'
2022-01-10 18:50:01 +01:00
Daniel Bevenius
bd24978e88 Fix 'the the' typo and add a missing 'it' 2022-01-10 18:46:26 +01:00
bors[bot]
01af8095fd
Merge #572
572: Makes the uarte endtx event available r=Dirbaio a=huntc

This PR allows `event_endtx` to be used outside of the `Uarte` itself. As a consequence, PPI can be used to drive tasks given the end of transmission on the Uarte. This is particularly useful for situations like RS485 where a GPIO may be required to be set to high when transmitting, then cleared when done. A non-PPI approach can cause a delay in the clearing of this GPIO as other Embassy tasks might become scheduled. Not clearing the GPIO in a timely manner can be problematic.

Here's an example of our usage with this change:

```rust
    let uarte_tx_enable = OutputChannel::new(
        p.gpiote_ch,
        Output::new(p.uarte_tx_enable_pin, Level::Low, OutputDrive::Standard),
        OutputChannelPolarity::Set,
    );

    let mut ppi = Ppi::new_one_to_one(p.ppi_ch, uarte.event_endtx(), uarte_tx_enable.task_clr());
    ppi.enable();
```

...and then later when writing:

```rust
    uarte_tx_enable.set();
    let _ = uarte_tx.write(&datagram_buf).await;
```

Co-authored-by: huntc <huntchr@gmail.com>
2022-01-10 12:35:40 +00:00
huntc
c54303be75 Makes the uarte endtx event available
This commit allows event_endtx to be used outside of the Uarte itself. As a consequence, PPI can be used to drive tasks given the end of transmission on the Uarte. This is particularly useful for situations like RS485 where a GPIO must be set to high when transmitting then cleared when done. A non-ppi approach can cause a delay in the clearing of this GPIO as other Embassy tasks might become scheduled.
2022-01-10 19:14:02 +11:00
bors[bot]
82e5edb940
Merge #567
567: Remove unsafe from new on RND r=Dirbaio a=huntc

Unsafe is not required here given that all futures are required to live longer than their global peripheral instances. There are other occurrences of unsafe being used on new that should be removed. I started to do that but then went down a bit of a rabbit hole. Therefore, just confining this PR to what I'm currently exposed to.

Co-authored-by: huntc <huntchr@gmail.com>
2022-01-06 10:15:46 +00:00
Dario Nieuwenhuis
23b9ede395
Merge pull request #568 from danbev/runtime-doc-typo
Fix typo in runtime.adoc
2022-01-06 11:15:14 +01:00
Daniel Bevenius
50c8f9adb8 Fix typo in basic_application.adoc 2022-01-06 11:11:52 +01:00
Daniel Bevenius
01ec70d241 Fix typo in hal.adoc 2022-01-06 10:56:47 +01:00
Daniel Bevenius
744eafd718 Fix typo in runtime.adoc 2022-01-06 10:03:50 +01:00
huntc
d5d8897c84 Remove unsafe from new on RND
Unsafe is not required here given that all futures are required to live longer than their global peripheral instances. There are other occurrences of unsafe being used on new that should be removed. I started to do that but then went down a bit of a rabbit hole.
2022-01-06 09:59:28 +11:00
bors[bot]
da0c25227f
Merge #566
566: stm32: more RCC cleanups. r=Dirbaio a=Dirbaio



Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-01-05 12:34:10 +00:00