Adam Greig
|
0621e957a0
|
time: Update examples, tests, and other code to use new Timer::after_x convenience methods
|
2023-10-15 01:30:12 +01:00 |
|
Dario Nieuwenhuis
|
b91d1eaca0
|
stm32/rcc: add LSE/LSI to all chips, add RTC to more chips.
|
2023-10-11 04:12:38 +02:00 |
|
Dario Nieuwenhuis
|
6186fe0807
|
stm32/rcc: use PLL enums from PAC.
|
2023-10-09 02:48:22 +02:00 |
|
Dario Nieuwenhuis
|
f1e7205055
|
stm32/rtc: enable lse in examples.
|
2023-09-30 00:18:30 +02:00 |
|
xoviat
|
f28ab18d7b
|
stm32: fix l4 re-export
|
2023-08-27 09:50:02 -05:00 |
|
xoviat
|
6a73ab1afa
|
stm32/l4: set rtc clock source in rcc
|
2023-08-08 19:58:03 -05:00 |
|
xoviat
|
b555af1c5d
|
stm32/rtc: fix exampel
|
2023-08-06 12:12:18 -05:00 |
|
Mathias
|
60b2f075dc
|
Merge branch 'main' of https://github.com/embassy-rs/embassy into embassy-stm32/rcc-rtc-l4
|
2023-07-03 19:33:26 +02:00 |
|
Mathias
|
d372df7ddb
|
L4: Switch to MSI to prevent problems with PLL configuration, and enable power to AHB bus clock to allow RTC to run
|
2023-07-01 12:16:23 +02:00 |
|