Commit Graph

29 Commits

Author SHA1 Message Date
Ulf Lilleengen
da61611f8f Add bootloader to CI 2022-04-27 15:17:18 +02:00
Ulf Lilleengen
484e0acc63 Add stm32 flash + bootloader support
* Add flash drivers for L0, L1, L4, WB and WL. Not tested for WB, but
should be similar to WL.
* Add embassy-boot-stm32 for bootloading on STM32.
* Add flash examples and bootloader examples
* Update stm32-data
2022-04-27 15:17:18 +02:00
Ulf Lilleengen
2c0e28aa0c Update to released lorawan crates 2022-04-26 19:06:15 +02:00
Ulf Lilleengen
86e52e67d0 Update to latest rust-lorawan version 2022-04-08 12:58:57 +02:00
Dario Nieuwenhuis
82803bffda Use embassy/defmt-timestamp-uptime in all examples. 2022-04-02 04:35:06 +02:00
Dario Nieuwenhuis
340eb4eead stm32: add rust stable support 2022-02-12 02:45:52 +01:00
Dario Nieuwenhuis
889d757ab8 stm32/spi: expose all functionality as inherent methods. 2022-01-19 17:59:55 +01:00
Dario Nieuwenhuis
c949519714 stm32/usart: expose all functionality as inherent methods. 2022-01-19 17:59:55 +01:00
Dario Nieuwenhuis
b526addf7b stm32/exti: expose all functionality as inherent methods. 2022-01-19 17:59:55 +01:00
Dario Nieuwenhuis
58fc64722c stm32/gpio: expose all functionality as inherent methods. 2022-01-19 17:59:55 +01:00
Dario Nieuwenhuis
2eb0cc5df7 stm32/rcc: remove Rcc struct, RccExt trait.
All the RCC configuration is executed in init().
2022-01-05 00:00:44 +01:00
Dario Nieuwenhuis
cdc66e110f stm32/rcc: remove builders on Config.
This makes API consistent with other Config structs in Embassy, where
the convention is to not use builders.
2022-01-04 13:31:30 +01:00
Ulf Lilleengen
9a730ef692 Refactor sx127x radio to use async SPI with DMA 2021-12-03 09:53:28 +01:00
Matous Hybl
0ca6060bfd Fix interrupt_take macro by specifying path to panic macro. 2021-11-23 11:00:37 +01:00
Ulf Lilleengen
16a47a0ad9 Add embassy-lora crate
This crate contains async radio drivers for various lora drivers that
work with embassy timers. The code is imported from Drogue Device (
https://github.com/drogue-iot/drogue-device)

The radio drivers integrate with the async LoRaWAN MAC layer in the
lorawan-device crate.

Also added is an example for the STM32WL55 and for STM32L0 (requires
the LoRa Discovery board) for LoRaWAN. Future work is to make the
underlying radio drivers using fully async SPI when communicating
with the peripheral.
2021-09-30 10:32:24 +02:00
Dario Nieuwenhuis
de016e8456 Remove trait_alias, allow(incomplete_features).
trait_alias seems unused. no idea why it's there.
2021-09-03 17:00:58 +02:00
Dario Nieuwenhuis
2c992f7010 stm32: move dbgmcu stuff to toplevel config setting, defaulting to true. 2021-08-19 23:50:19 +02:00
Ulf Lilleengen
cbff0398bb
Add IRQ-driven buffered USART implementation for STM32 v2 usart (#356)
* Add IRQ-driven buffered USART implementation for STM32 v2 usart

* Implementation based on nRF UARTE, but simplified to not use DMA to
  avoid complex interaction between DMA and USART.
* Implementation of AsyncBufRead and AsyncWrite traits
* Some unit tests to ring buffer
* Update polyfill version
* Update sub module to get usart IRQ fix
2021-08-16 17:16:49 +02:00
Ben Gamari
f4950c4449 examples: Consistently use unwrap! in favor of .unwrap()
Unfortunately errors from `embedded_graphics` and `core` doesn't provide
the necessary instances currently.
2021-08-05 22:39:59 +02:00
Dario Nieuwenhuis
0ea6a2d890 time: replace dyn clock/alarm with a global Driver trait 2021-08-05 19:14:09 +02:00
Dario Nieuwenhuis
07d4b196f7 Update nightly, remove removed features. 2021-08-04 19:48:14 +02:00
Dario Nieuwenhuis
a1a5acb825 rustfmt everything 2021-08-04 15:25:21 +02:00
Ulf Lilleengen
6ff0614cb6 Add uart::Read DMA-based implementation
* Rename existing read() to bread() (blocking)
2021-08-03 15:31:24 +02:00
Timo Kröger
cad43587e6 stm32l0: Use embassy::main for examples 2021-07-29 17:37:32 +02:00
Bob McWhirter
638235e72d Fix up the L0 example for SPI. 2021-07-23 13:22:39 -04:00
Thales Fragoso
0eaadfc125 stm32: Update gpio examples 2021-06-25 18:16:43 -03:00
Ulf Lilleengen
b6a8703698 Add support for generating PAC for dual cores
* Chips that have multiple cores will be exposed as chipname_corename,
  i.e. stm32wl55jc_cm4
* Chips that have single cores will use the chip family as feature name
  and pick the first and only core from the list
* Add support for stm32wl55 chip family
2021-06-16 15:12:07 +02:00
Ulf Lilleengen
95532726b2 Add minimal RCC impls for L4 and F4 2021-06-14 11:33:11 +02:00
Ulf Lilleengen
1bb7123156 Add examples for STM32L0 2021-06-09 23:09:48 +02:00