1215: Add clone to embassy_rp::gpio::Level r=Dirbaio a=Slushee-a
Allows you to wite a cleaner state change detector. Example:
```rs
let mut button_state: Level = Level::Low;
let mut prev_button_state: Level = button_state;
loop {
button_state = button.get_level();
if prev_button_state != button_state {
led.set_level(button_state); // Takes ownership of button_state.
}
prev_button_state = button_state; // Can't be done since the ownership has been moved.
// Adding Clone makes this code possible
}
```
Co-authored-by: Slushee <55996847+Slushee-a@users.noreply.github.com>
1213: stm32: fix fmc-related build failures on some F4's r=Dirbaio a=Dirbaio
f413vh has a peripheral named `FSMC` but using the `FMC` regs. This might be a mistake? `@rmja`
Fix build for now, we can investigate later if the regs are OK.
bors r+
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
1211: Fix rcc prescaler for wl55 HCLK1 r=lulf a=chrenderle
fix "prescaler none" which incorrectly set "prescaler divided by 3"
Issue: #1168
Co-authored-by: Christian Enderle <mail@chrenderle.de>
1210: nrf/qspi: do not panic when canceling futures. r=Dirbaio a=Dirbaio
QSPI can't cancel DMA transfers. Before we'd panic on cancel, now we blocking-wait instead.
Blocking is not great, but it's better than panicking, especially when using code that's hardware-agnostic through the embedded-storage traits.
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
1209: Time: Add from_hz function for Duration. r=Dirbaio a=CBJamo
I found myself doing things like this
```rust
let rate_us = 1_000_000 / rate_hz;
let mut ticker = Ticker::every(Duration::from_micros(rate_us));
```
Several times, and figured it was worth adding a little convenience function to handle that. This also makes the calculation const, which is a nice little upside. The compiler might have been doing that already, but this makes sure.
Speaking of const, would it be better to give hz as a float? Obviously we'd want to avoid that at runtime since many targets don't have a fpu, but if it's at compile time that doesn't matter and a float may be more ergonomic.
Co-authored-by: Caleb Jamison <caleb@cbjamo.com>
1205: stm32/rng Fix rng generation lock-up r=Dirbaio a=lucasgranberg
This PR fixes a problem where the device gets locked in case of rng errors.
The PR also includes a hack for stm32wl based devices where the more complicated RNG peripheral can get stuck on seed errors.
Co-authored-by: Lucas Granberg <lukkeg@gmail.com>
1203: usb: unify ControlHandler+DeviceStateHandler, route all control requests to all handlers. r=Dirbaio a=Dirbaio
depends on #1202
- Allows classes to handle vendor requests. (fixes#1078)
- Allows classes to use a single handler for multiple interfaces.
- Allows classes to access the other events (previously only `reset` was available).
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
- Allows classes to handle vendor requests.
- Allows classes to use a single handler for multiple interfaces.
- Allows classes to access the other events (previously only `reset` was available).
1200: feat(stm32): Add 16 data bit fmc ctor r=Dirbaio a=rmja
This has been validated with the Is42s16400j sdram on stm32f429.
Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
1199: STM32 SPI: Set clk-pin pull-up/-down to match spi clock polarity r=Dirbaio a=jr-oss
Fixes#1094
There are some proposed solutions in #1094
> Keep the DMA transaction open across calls to read/write
This may be problematic if the user changes bus settings between calls, and also the reference manual says the chip should not be placed into low power mode while SPI is enabled
As already described, this is problematic and against reference manual recommendation
> Set the CLK (and maybe MOSI) pins as pull-down on setup (or pull-up, depending on config - and this would need to be updated if the user modified the config)
This is less good than driving the pin to the correct value, but may be better than nothing
That is also my preferred solution. See below citation from reference manual.
> Document this and require users fix it themselves (add a pull-up/down resistor - or configure the pins as pull-up/pull-down before passing them into SPI setup)
Setting internal pull-up/-down won't work, because `sck.set_as_af()` will change the gpio pull mode to none: https://github.com/embassy-rs/embassy/blob/master/embassy-stm32/src/gpio.rs#L552-L555
> Dig around in the reference manual and determine if there is a better way to start/stop a DMA transaction while keeping active control of the clock the whole time
I haven't found a better way
------
From ST reference manual RM0394 (L4)
(Same note in RM0399 (H7) / RM0038 (L1) / RM0316 /F3)):
40.4.6
Communication formats
...
The idle state of SCK must correspond to the polarity selected in the SPIx_CR1 register (by
pulling up SCK if CPOL=1 or pulling down SCK if CPOL=0).
Co-authored-by: Ralf <jr-oss@gmx.net>
