Commit Graph

87 Commits

Author SHA1 Message Date
533ceb707c stm32: add tim4, tim5 support for time-driver (stm32f410 doesn't have tim2, tim3) 2022-01-24 00:50:10 +01:00
79f60adbfb stm32: add time-driver-any cargo feature that automatically picks one available timer. 2022-01-24 00:24:53 +01:00
2bc105803a Make exti an optional feature
* Add embassy-stm32 build with exti
* Add exti to examples
2022-01-12 14:28:10 +01:00
3811c0a401 Add adapter for implementing async traits for blocking types
This allows writing drivers relying on async traits, while still
functioning with implementations that already implement the embedded-hal
traits.

Add examples to stm32l4 for using this feature.
2021-12-17 12:54:51 +01:00
7733d11f90 [generate] Add stm32f3 chips to the Cargo manifest 2021-12-13 13:49:41 +05:30
88d4b0c00d stm32: add stm32g4 support. 2021-11-27 02:34:23 +01:00
e187f50f4b stm32: remove unused deps 2021-11-24 01:41:51 +01:00
dfb6d407a1 stm32: rename core features from _cmX to -cmX, cleanup gen. 2021-11-23 23:49:06 +01:00
ee1490bce1 Move to the newly released bxcan crate that supports defmt 0.3. 2021-11-15 13:18:53 -05:00
c2da498263 Update to defmt 3.0ish.
Lots of gitrevs deps.
2021-11-15 11:09:08 -05:00
1bf6e646c9 Merge #465
465: Adjust for STM32U5. r=lulf a=bobmcwhirter



Co-authored-by: Bob McWhirter <bmcwhirt@redhat.com>
2021-11-02 20:42:41 +00:00
205a223af3 Update versions of critical-section and atomic-polyfill 2021-11-02 18:52:03 +01:00
f12b70535b Adjust for STM32U5. 2021-11-02 12:05:24 -04:00
015cad84dd Initial support for STM32F767ZI. 2021-10-26 17:33:28 +02:00
ce361abb1b Changing the casts (code review request) 2021-09-28 18:31:04 +02:00
bce909ec1e Initial STM32F1 family support with two examples for STM32F103C8 (Blue Pill) 2021-09-28 18:31:04 +02:00
7d6d274d55 Add MSI and PLL clock source for L4 2021-09-24 18:27:39 +02:00
c79485c286 Support for STM32L1
* Add RCC
* Fix more issues with dash in chip names
* Update stm32-data version
* Add blinky and spi example
2021-09-21 14:50:23 +02:00
bb72f7eb98 Merge pull request #390 from lulf/wasm-executor
Wasm executor support
2021-09-13 18:55:17 +02:00
99a94f1d50 Update version of critical-section 2021-09-13 17:05:17 +02:00
d6faf69e09 Merge pull request #378 from numero-744/gen-features-using-rust-not-python
Use our beloved Rust instead of Python
2021-09-13 16:47:01 +02:00
e24528051b Add WASM support for executor
* Adds an executor for WASM runtimes based on wasm_bindgen.
* Add time driver based on JS time handling.
* Add example that can run in browser locally.
* Update to critical-section version that supports 'std' flag
2021-09-13 16:42:39 +02:00
99ccf18160 fix(gen-features): keep data files order 2021-09-11 20:04:57 +02:00
f2623e7e9b Update lots of deps 2021-09-11 01:35:23 +02:00
7ad6280e65 Add HAL for SubGhz peripheral for STM32 WL series
Based on the HAL from stm32wl, the peripheral driver has been
modified to fit into embassy, using the embassy APIs, providing
operation of the radio peripheral.

The initial version does not offer any async APIs, but the example
shows how the radio IRQ can be used to perform async TX of the radio.
2021-09-02 10:39:56 +02:00
022b809248 refactor(gen_features): use Rust instead of Python
Done for /embassy-stm32 only
The new generator is in /stm32-gen-features
/stm32-metapac could/should be added too
A CI check "generated features up to date" could/should be performed
2021-08-27 11:09:27 +02:00
e2f71ffbbd Add support for STM32G0 2021-08-20 00:15:11 +02:00
d3aeb45fb3 Update cortex-m-rt to v0.7 for stm32, rp. 2021-08-19 00:56:11 +02:00
0c3bede64f bxcan: Make bxcan a hard dependency
There seems no way to enable a optional dependency from build.rs or
features passed through the command line.
2021-08-18 21:58:50 +02:00
7c405250a7 CAN support with bxcan crate 2021-08-18 21:58:50 +02:00
cbff0398bb Add IRQ-driven buffered USART implementation for STM32 v2 usart (#356)
* Add IRQ-driven buffered USART implementation for STM32 v2 usart

* Implementation based on nRF UARTE, but simplified to not use DMA to
  avoid complex interaction between DMA and USART.
* Implementation of AsyncBufRead and AsyncWrite traits
* Some unit tests to ring buffer
* Update polyfill version
* Update sub module to get usart IRQ fix
2021-08-16 17:16:49 +02:00
b1d631d639 stm32/time: add Cargo features to choose tim2/tim3 2021-08-05 19:14:09 +02:00
63b32b39e1 Use an em bikeshed instead of an underscore bikeshed. 2021-08-02 13:29:06 -04:00
5f9447abb4 Put the implicit memory.x behind a memory_x feature on embassy-stm32. 2021-08-02 13:21:30 -04:00
7bfb763e09 Rename embassy-extras to embassy-hal-common 2021-07-29 13:44:51 +02:00
f916fe5476 all hals: reexport PAC if unstable-pac feature is set. 2021-07-14 22:19:04 +02:00
35a76c364a embassy/time: make optional via Cargo feature 2021-07-12 03:45:48 +02:00
797534d1a6 Update features to include F0 2021-06-22 14:41:42 -03:00
098ce6e740 stm32h7: Add ethernet example 2021-06-16 16:48:35 +02:00
77546825a1 stm32: Make vcell dependency optional 2021-06-16 16:48:35 +02:00
598201bff3 eth-v2: Make embassy-net optional 2021-06-16 16:48:35 +02:00
46e1bae9e3 eth-v2: Start Ethernet peripheral implementation 2021-06-16 16:48:35 +02:00
b6a8703698 Add support for generating PAC for dual cores
* Chips that have multiple cores will be exposed as chipname_corename,
  i.e. stm32wl55jc_cm4
* Chips that have single cores will use the chip family as feature name
  and pick the first and only core from the list
* Add support for stm32wl55 chip family
2021-06-16 15:12:07 +02:00
0eab96f573 Initial support and example for STM32WB55 2021-06-12 07:06:36 +02:00
0ffa78aca1 Use macrotables from build.rs 2021-06-07 05:12:10 +02:00
1a9a619033 Implement togglable output pin for Output 2021-05-31 09:33:33 +02:00
60f12c78dd Add resolver=2 2021-05-31 02:43:59 +02:00
d8e4421fc6 Add stm32-metapac crate, with codegen in rust 2021-05-31 02:40:58 +02:00
a9ec941dca i2c v1 2021-05-25 14:47:07 -04:00
1c10e746b6 Re-adds embassy macros for stm32
* Hook RCC config into chip config and use chip-specific RCC init
  function
* RTC/clock setup is ignored for now
2021-05-25 13:30:42 +02:00