Commit Graph

1135 Commits

Author SHA1 Message Date
Rasmus Melchior Jacobsen
50b0fb1a37 Let get_flash_regions be public 2023-03-31 15:47:45 +02:00
Mathias
cfbe93c280 Rework bufferedUart to get rid of PeripheralMutex in a similar fashion as nrf & rp. Also adds embedded-hal traits to bufferedUart 2023-03-31 10:43:30 +02:00
Rasmus Melchior Jacobsen
f3dcb5eb22 Wrap write/erase operations in cs 2023-03-30 15:13:44 +02:00
Rasmus Melchior Jacobsen
a78e10e003 Add defmt support to new flash types 2023-03-30 09:17:14 +02:00
Rasmus Melchior Jacobsen
02caec9482 Skip unknown banks 2023-03-30 09:07:23 +02:00
Rasmus Melchior Jacobsen
760d4a72cb Ensure that embedded_storage traits are actually implemented 2023-03-30 09:05:13 +02:00
Rasmus Melchior Jacobsen
e7129371d0 Let sector computation be shared across families 2023-03-30 08:32:36 +02:00
Rasmus Melchior Jacobsen
e3c4e00be0 Align families 2023-03-30 06:01:56 +02:00
Rasmus Melchior Jacobsen
91d8afd371 Add AltFlashLayout for supported F4 chips 2023-03-30 05:27:57 +02:00
Rasmus Melchior Jacobsen
89129babf9 Merge remote-tracking branch 'upstream/master' into flash-regions 2023-03-30 04:53:07 +02:00
Rasmus Melchior Jacobsen
def576ac46 Remove FlashRegion trait and rename Settings to FlashRegion 2023-03-30 04:24:41 +02:00
Rasmus Melchior Jacobsen
ef1890e911 Remove flash operations from FlashRegion trait and move to common module 2023-03-29 15:45:18 +02:00
bors[bot]
754bb802ba
Merge #1294
1294: Add support for `QSPI` in `stm32` r=Dirbaio a=Mirror0

Implemented with help of Tomasz Grześ <tomasz.grzes@gmail.com>.

Tested only on stm32f777zi.

Co-authored-by: Mateusz Butkiewicz <mateusz@github.butkiewicz.dev>
2023-03-29 13:42:29 +00:00
Rasmus Melchior Jacobsen
68c260edeb Use stm32-metapac v2 2023-03-29 15:03:48 +02:00
Rasmus Melchior Jacobsen
fc8c83e00a Fix h7 compile error 2023-03-29 14:50:19 +02:00
Mateusz Butkiewicz
87898501a2 feat(stm32:qspi): convert some u8 to enum variants 2023-03-29 14:28:25 +02:00
Rasmus Melchior Jacobsen
a0d089536a Merge branch 'flash-regions' of https://github.com/rmja/embassy into flash-regions 2023-03-29 14:10:33 +02:00
Rasmus Melchior Jacobsen
15e1747220 Fix build of not implemented family 2023-03-29 14:10:16 +02:00
Rasmus Melchior Jacobsen
0bbc3a3d81
Merge branch 'master' into flash-regions 2023-03-29 13:59:17 +02:00
Rasmus Melchior Jacobsen
5a12fd6c75 Add unimplemented family section 2023-03-29 13:57:33 +02:00
Rasmus Melchior Jacobsen
b7dfc8de10 Let flash module be conditionally included 2023-03-29 13:52:52 +02:00
Rasmus Melchior Jacobsen
ddbd509865 Move as much logic from families to shared module as possible 2023-03-29 13:37:45 +02:00
Rasmus Melchior Jacobsen
69944675a3 Expose get_sector in favor of is_eraseable_range 2023-03-29 12:49:13 +02:00
Rasmus Melchior Jacobsen
4ee3d15519 Keep peripheral lifetime when calling into_regions() 2023-03-29 12:10:24 +02:00
Rasmus Melchior Jacobsen
6806bb9692 Expose flash region settings as an array 2023-03-29 11:52:18 +02:00
Rasmus Melchior Jacobsen
d6ce1c4325 Support running tests in embassy-stm32 and move impl from common back to stm32 2023-03-29 11:31:45 +02:00
bors[bot]
7a841b58d1
Merge #1307
1307: (embassy-stm32): add embedded-io blocking Read + Write for BufferedUart r=MathiasKoch a=MathiasKoch



Co-authored-by: Mathias <mk@blackbird.online>
2023-03-28 12:35:07 +00:00
Mathias
14f6bc88ea Remove unnecessary lifetime 2023-03-28 14:34:36 +02:00
Mathias
2d7f35cf57 Add embedded-io blocking Read + Write for BufferedUart 2023-03-28 14:28:44 +02:00
Mateusz Butkiewicz
6a802c4708 feat(stm32:qspi): add support for QSPI in stm32
Implemented with help of Tomasz Grześ <tomasz.grzes@gmail.com>.
2023-03-27 13:20:00 +02:00
Dario Nieuwenhuis
a33774ec51 Update stm32-metapac 2023-03-27 12:36:31 +02:00
Rasmus Melchior Jacobsen
e9a5b31fa8 Implement drop for FlashRegions 2023-03-25 17:00:52 +01:00
Rasmus Melchior Jacobsen
e8fc7a66a3 Ensure flash module and FlashRegion trait is always defined 2023-03-25 16:32:32 +01:00
Rasmus Melchior Jacobsen
bc69eb596e Add is_eraseable_range and split write into consecutive parts 2023-03-25 16:04:45 +01:00
Rasmus Melchior Jacobsen
73ccc04231 Change region type name 2023-03-25 13:47:28 +01:00
Rasmus Melchior Jacobsen
47d5f127bb Align L family 2023-03-25 13:30:24 +01:00
Rasmus Melchior Jacobsen
47e07584ca Align H7 family 2023-03-25 13:03:00 +01:00
Rasmus Melchior Jacobsen
c848bd9c9c Align with removal of MemoryRegionKind::Otp 2023-03-25 13:02:42 +01:00
Rasmus Melchior Jacobsen
a8567f0617 Align F7 family 2023-03-25 06:26:00 +01:00
Rasmus Melchior Jacobsen
7edd72f8f5 Align F3 family 2023-03-25 06:07:57 +01:00
Rasmus Melchior Jacobsen
6c73b23f38 Align F4 family 2023-03-25 05:59:40 +01:00
Rasmus Melchior Jacobsen
6b44027eab Add FlashRegion trait and implement embedded_storage traits for each region 2023-03-25 05:58:40 +01:00
Rasmus Melchior Jacobsen
cccceb88f2 Generate flash regions during build 2023-03-25 05:57:15 +01:00
Dario Nieuwenhuis
0b49b588a2 stm32: use stm32-metapac from crates.io, remove stm32-data submodule. 2023-03-20 02:38:12 +01:00
Eric Yanush
13f0c64a8c Fix APB clock calculation for several STM32 families 2023-03-16 21:21:39 -06:00
Dario Nieuwenhuis
43462947ed stm32: remove unused embedded-storage-async. 2023-03-14 17:27:40 +01:00
Davide Della Giustina
c0e40b887b
Apply fix 2023-03-01 20:57:13 +00:00
Dario Nieuwenhuis
351e4407ef
Merge pull request #1252 from pattop/stm32_spi_fifo_fix
stm32/spi: fix occasional data corruption
2023-03-01 03:08:05 +01:00
Patrick Oppenlander
aabc275186 stm32/spi: fix occasional data corruption
Need to clear the rx fifo before enabling rx dma.
2023-03-01 12:24:22 +11:00
Davide Della Giustina
3c601bf8d2
PacketQueue::init() does not need to be unsafe 2023-02-28 18:04:43 +00:00
Davide Della Giustina
485bb76e46
Implemented suggestions from @Dirbaio 2023-02-28 17:39:02 +00:00
Davide Della Giustina
c1e93c0904
PacketQueue::new() uses ::init() when in nightly 2023-02-28 14:34:26 +00:00
Davide Della Giustina
90f2939bf6
Added PacketQueue::init() 2023-02-28 14:22:54 +00:00
Grant Miller
7be4337de9 Add #[must_use] to all futures 2023-02-24 13:01:41 -06:00
bors[bot]
3255e0a172
Merge #1228
1228: stm32/sdmmc: Implement proper clock configuration r=chemicstry a=chemicstry

This implements proper clock configuration for sdmmc based on chip family, because `RccPeripheral::frequency()` is almost always incorrect. This can't be fixed in PAC, because sdmmc uses two clock domains, one for memory bus and one for sd card. `RccPeripheral::frequency()` usually returns the memory bus clock, but SDIO clock calculations need sd card domain clock. Moreover, chips have multiple clock source selection bits, which makes this even more complicated. I'm not sure if it's worth implementing all this logic in `RccPeripheral::frequency()` instead of cfg's in sdmmc.

Some chips (Lx, U5, H7) require RCC updates to expose required clocks. I didn't want to mash everything in a single PR so left a TODO comment. I also left a `T::frequency()` fallback, which seemed to work in H7 case even though the clock is most certainly incorrect.

In addition, added support for clock divider bypass for sdmmc_v1, which allows reaching a maximum clock of 48 MHz. The peripheral theoretically supports up to 50 MHz, but for that ST recommends setting pll48 frequency to 50 MHz 🤔

Co-authored-by: chemicstry <chemicstry@gmail.com>
2023-02-23 16:22:31 +00:00
chemicstry
73ef85b765 stm32/sdmmc: Fix compile errors 2023-02-23 18:00:55 +02:00
bors[bot]
f0f92909c1
Merge #1227
1227: stm32/dma: fix spurious transfer complete interrupts r=Dirbaio a=pattop

DMA interrupts must be acknowledged by writing to the DMA_{L,H}IFCR
register.

Writing to the CR register is unnecessary as the channel (EN bit) is
disabled by hardware on completion of the transfer.


Co-authored-by: Patrick Oppenlander <patrick.oppenlander@gmail.com>
2023-02-23 15:44:43 +00:00
chemicstry
896764bb85 stm32/sdmmc: Refactor TypeId into a macro 2023-02-23 17:38:52 +02:00
chemicstry
42462681bd stm32/sdmmc: Implement proper clock configuration 2023-02-23 16:57:21 +02:00
Patrick Oppenlander
4e884ee2d2 stm32/dma: fix spurious transfer complete interrupts
DMA interrupts must be acknowledged by writing to the DMA_{L,H}IFCR
register.

Writing to the CR register is unnecessary as the channel (EN bit) is
disabled by hardware on completion of the transfer.
2023-02-23 10:12:48 +11:00
chemicstry
a53f525f51 stm32/sdmmc: Fix SDIOv1 writes 2023-02-18 01:37:06 +02:00
Mathias
5e74926907 feature-gate variants without vals defined 2023-02-13 15:46:49 +01:00
Mathias
218b44652c Rebase on master 2023-02-13 14:55:15 +01:00
Dario Nieuwenhuis
363054de98 stm32: doc all chips. 2023-02-13 03:02:12 +01:00
Dario Nieuwenhuis
1e36c91bf8 stm32: fix fmc-related build failures on some F4's 2023-02-13 02:22:06 +01:00
Christian Enderle
d21643c060 fix "prescaler none" which incorrectly set "prescaler divided by 3" 2023-02-12 11:36:57 +01:00
Lucas Granberg
2b6654541d rustfmt 2023-02-09 13:01:44 +02:00
Lucas Granberg
43d018b67f Use rng_v2 cfg instead of chip specific for seed error recover hack 2023-02-09 12:44:20 +02:00
Lucas Granberg
bab4277a86 hack for STM32WL, rcc reset in case of seed error
The STM32WL series has a more complicated rng device that gets stuck
when there is a seed error.
2023-02-08 17:57:37 +02:00
Lucas Granberg
da6b1e8399 Reset rng in case of clock or seed error 2023-02-08 17:52:49 +02:00
bors[bot]
4a224efe75
Merge #1200
1200: feat(stm32): Add 16 data bit fmc ctor r=Dirbaio a=rmja

This has been validated with the Is42s16400j sdram on stm32f429.

Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
2023-02-07 22:24:15 +00:00
bors[bot]
c4a2c62096
Merge #1199
1199: STM32 SPI: Set clk-pin pull-up/-down to match spi clock polarity r=Dirbaio a=jr-oss

Fixes #1094 

There are some proposed solutions in #1094 

> Keep the DMA transaction open across calls to read/write
        This may be problematic if the user changes bus settings between calls, and also the reference manual says the chip should not be placed into low power mode while SPI is enabled

As already described, this is problematic and against reference manual recommendation

>    Set the CLK (and maybe MOSI) pins as pull-down on setup (or pull-up, depending on config - and this would need to be updated if the user modified the config)
        This is less good than driving the pin to the correct value, but may be better than nothing

That is also my preferred solution. See below citation from reference manual.

>    Document this and require users fix it themselves (add a pull-up/down resistor - or configure the pins as pull-up/pull-down before passing them into SPI setup)

Setting internal pull-up/-down won't work, because `sck.set_as_af()` will change the gpio pull mode to none: https://github.com/embassy-rs/embassy/blob/master/embassy-stm32/src/gpio.rs#L552-L555

>    Dig around in the reference manual and determine if there is a better way to start/stop a DMA transaction while keeping active control of the clock the whole time

I haven't found a better way

------
From ST reference manual RM0394 (L4) 
(Same note in RM0399 (H7) / RM0038 (L1) / RM0316 /F3)):

    40.4.6
    Communication formats
    ...
    The idle state of SCK must correspond to the polarity selected in the SPIx_CR1 register (by
    pulling up SCK if CPOL=1 or pulling down SCK if CPOL=0).


Co-authored-by: Ralf <jr-oss@gmx.net>
2023-02-07 22:06:25 +00:00
Rasmus Melchior Jacobsen
7b11e339bd feat(fmc): Add 16 data bit ctor 2023-02-07 16:06:59 +01:00
Rasmus Melchior Jacobsen
1b6aae9dde Also exclude fsmc_v1x3 2023-02-07 15:06:16 +01:00
Rasmus Melchior Jacobsen
494a76a0f1 React to updated fsmc versions 2023-02-07 14:14:47 +01:00
Rasmus Melchior Jacobsen
218f8e0490 fix(stm32): Align FMC with new versions from stm32-data 2023-02-07 12:17:37 +01:00
bors[bot]
c8a7b74bc2
Merge #1192 #1193
1192: stm32/usart: implement stop_bits configuration r=Dirbaio a=pattop



1193: stm32/usart: fix LPUART clock multiplier r=Dirbaio a=pattop

According to RM0351 Rev 9 (L4) and RM0399 Rev 3 (H7):

baud = (256 * clock) / LPUARTDIV


Co-authored-by: Patrick Oppenlander <patrick.oppenlander@gmail.com>
2023-02-06 13:39:37 +00:00
Ralf
e3174d7a99 STM32 SPI: Set clk-pin pull-up/-down to match spi clock polarity
RM0394:

    40.4.6
    Communication formats
    ...
    The idle state of SCK must correspond to the polarity selected in the SPIx_CR1 register (by
    pulling up SCK if CPOL=1 or pulling down SCK if CPOL=0).
2023-02-06 13:23:35 +01:00
Patrick Oppenlander
fda36fd81b stm32/usart: fix LPUART clock multiplier
According to RM0351 Rev 9 (L4) and RM0399 Rev 3 (H7):

baud = (256 * clock) / LPUARTDIV
2023-02-06 11:22:41 +11:00
Patrick Oppenlander
64ebb9b7fe stm32/usart: implement stop_bits configuration 2023-02-06 09:44:15 +11:00
Josh Mcguigan
0bb6000e5c stm32 gpio implement degrade to AnyPin 2023-02-02 21:42:42 -08:00
Dario Nieuwenhuis
ca10fe7135 usb: docs 2023-01-31 22:27:19 +01:00
Christian Enderle
5e3c33b777 Fix rcc prescaler for wb55 HCLK1
- fix prescaler not divided which incorrectly set prescaler divided by 3
2023-01-21 14:39:25 +01:00
Dario Nieuwenhuis
0412d1922c fix embedded-sdmmc integration.
- Rename feature to `embedded-sdmmc`.
- Move embedded-sdmmc fork repo to the embassy-rs org.
- Remove unused features in the fork
- Fix impl in embassy-stm32
- Add to CI so it doesn't break again.
2023-01-21 00:32:34 +01:00
Dario Nieuwenhuis
f604153f05 stm32/rcc: print actual freqs on boot. 2023-01-20 16:31:04 +01:00
bors[bot]
f0ae1f9133
Merge #1159
1159: stm32 usb otg bug fixes r=Dirbaio a=chemicstry

This fixes a couple of usb otg bugs that surfaced with `usb_ethernet` example from nrf:
- Properly implemented `Endpoint::wait_enabled()`
- Return `EndpointError::Disabled` when neccessary in `Endpoint::write()`


Co-authored-by: chemicstry <chemicstry@gmail.com>
2023-01-18 11:30:44 +00:00
huntc
6ab4ecaf83 Stop sampling when exiting the Saadc methods
Prior to this commit, the onDrop function was being dropped immediately and not on exiting the Saadc sampling methods.
2023-01-18 14:51:46 +11:00
chemicstry
b1203bf036 stm32/usb_otg: fix core formatter 2023-01-18 03:06:32 +02:00
chemicstry
f07e59b24a stm32/usb_otg: prevent writes on disabled endpoint 2023-01-18 02:31:28 +02:00
chemicstry
d2f2b451d0 stm32/usb_otg: implement endpoint wait_enabled 2023-01-18 02:29:49 +02:00
Dario Nieuwenhuis
2a349afea7 stm32: add stm32c0 support. 2023-01-17 21:28:16 +01:00
bors[bot]
aea5a0fd96
Merge #1140
1140: feat(stm32): Let uart implement embedded-io Write trait r=Dirbaio a=rmja



Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
2023-01-14 19:45:28 +00:00
Rasmus Melchior Jacobsen
16590732f8 Update mod.rs 2023-01-14 07:13:29 +01:00
Rasmus Melchior Jacobsen
816b214403 Only implement Write 2023-01-14 07:12:43 +01:00
Dario Nieuwenhuis
041531c829 stm32/rcc: fix u5 pll, add hsi48. 2023-01-11 17:57:22 +01:00
chemicstry
0feecd5cde stm32: add USB OTG support.
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-01-11 17:56:47 +01:00
Dario Nieuwenhuis
065a0a1ee7 Update stm32-data. 2023-01-11 17:51:30 +01:00
chemicstry
ce842fe28c Refactor embassy-usb address handling to allow reordering of status resoponse 2023-01-11 17:47:12 +01:00
Rasmus Melchior Jacobsen
4c4b47f78a feat(stm32): Add embedded-io traits for UartRx and UartTx 2023-01-06 14:24:29 +01:00
Rasmus Melchior Jacobsen
5aa59e9737 feat(stm32): Let uart implement embedded-io Read/Write 2023-01-04 12:57:19 +01:00
Dario Nieuwenhuis
1f033d509a net: split driver trait to a separate crate. 2022-12-26 04:49:08 +01:00
Dario Nieuwenhuis
10c9cc31b1 Remove unnecessary use of atomic-polyfill.
Only use it when CAS is actually needed.
2022-12-23 20:46:49 +01:00
Dario Nieuwenhuis
cd9a65ba39 stm32/usb: use separate irq flags.
- Fixes race condition that could cause losing irqs (because `if flags != 0` was clearing all)
- Doesn't need CAS, which is nice for thumbv6.
2022-12-23 20:45:51 +01:00
Rasmus Melchior Jacobsen
47a0769fc2 Let repeated clock byte be singular pointer and not array pointer 2022-12-23 15:49:22 +01:00
Rasmus Melchior Jacobsen
e9a2c4a9e3 Let start_write_repeated accept pointer instead of slice 2022-12-23 15:40:09 +01:00
Rasmus Melchior Jacobsen
662bb5797f fix(stm32): Ensure that gpio speed is VeryHigh for all spi versions
This fixes #1095
2022-12-23 09:34:42 +01:00
Rasmus Melchior Jacobsen
2457fcaa35 fix(stm32): Align with updated dma::write_repeated signature 2022-12-23 09:33:34 +01:00
Rasmus Melchior Jacobsen
da9ee83756 fix(stm32): Fix write buffer lifetime for repeated writes 2022-12-23 09:32:18 +01:00
Dario Nieuwenhuis
5eae295c8a stm32: rename feature net to embassy-net.
The eth code is always built and available, but has no own API (other
than the embassy-net Device impl) to rx/tx packets. We could add this
API in the future, so the feature only means "embassy-net support".
2022-12-13 16:43:25 +01:00
Dario Nieuwenhuis
3005ee0178 stm32/eth_v2: update to new embassy-net trait, remove PeripheralMutex. 2022-12-13 16:43:25 +01:00
Dario Nieuwenhuis
8f30652109 stm32/eth_v1: update to new embassy-net trait, remove PeripheralMutex. 2022-12-13 16:43:25 +01:00
Vincent Stakenburg
236d104844 embassy-stm32: add rs485 driver enable to uart 2022-12-09 14:26:09 +01:00
chemicstry
7bda01ec24 Fix comment 2022-12-06 23:31:58 +02:00
chemicstry
ef2b83cc03 Reset sdmmc clock on card init 2022-12-06 16:36:07 +02:00
bors[bot]
9f854110f2
Merge #1082 #1083
1082: stm32: Add basic support for DMA priority settings r=lulf a=matoushybl

This adds very basic support for specifying priority for DMA interrupts. Unfortunately, the patch now doesn't allow for specifying different priorities for DMA1/DMA2, or BDMA1/BDMA2, which I didn't know how to support.

1083: stm32: Fix H7 unaligned erase r=lulf a=matoushybl

This PR simplifies erasing sectors on the H7, which was buggy.

Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2022-12-01 13:49:59 +00:00
bors[bot]
d8ea297d6a
Merge #1088
1088: stm32: Enable fifo for buffered uart r=lulf a=matoushybl

This PR enables fifo for buffered uart where it is available. This should hopfully get rid of some overrun errors. I tried it in my application where it worked, but more intensive testing is probably required.

Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2022-12-01 13:34:52 +00:00
Matous Hybl
e1d7d8d841 stm32: Enable fifo for buffered uart 2022-11-30 22:17:51 +01:00
Guillaume MICHEL
e0ea5dfdb2 embassy-stm32: Allow SPI with DMA to implement blocking embbeded-hal traits 2022-11-30 09:26:16 +01:00
Matous Hybl
4cc0463123 stm32: Add basic support for DMA priority settings 2022-11-28 21:22:39 +01:00
Matous Hybl
2a35a09444 stm32: Fix H7 unaligned erase 2022-11-28 21:15:24 +01:00
Gabriel Smith
3ca14ba4e9 usb-driver: Remove unncessary lifetime 2022-11-27 16:28:24 -05:00
Dario Nieuwenhuis
1e2fb0459d Switch to async-fn-in-trait 2022-11-25 21:02:06 +01:00
Jaxter Kim
551b54ddcb stm32g0: Fix ADC for channels above 14 2022-11-15 12:56:47 +01:00
bors[bot]
d05979c708
Merge #1052 #1053
1052: stm32: Fix watchdog division by zero for 256 prescaler, add watchdog … r=lulf a=matoushybl

…example for H7

The problem is that `2u8.powi(8) == 0`, which causes division by zero.

1053: Disable MMC interrupts r=lulf a=matoushybl

MMC interrupts can cause firmware hangup - refer to: https://github.com/stm32-rs/stm32h7xx-hal/issues/275 for more information

Fixes #594 

Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2022-11-11 08:04:16 +00:00
Matous Hybl
99682d313b Disable MMC interrupts
MMC interrupts can cause firmware hangup - refer to: https://github.com/stm32-rs/stm32h7xx-hal/issues/275 for more information
2022-11-10 17:21:42 +01:00
Matous Hybl
cbc97758e3 stm32: Fix watchdog division by zero for 256 prescaler, add watchdog example for H7 2022-11-10 15:56:28 +01:00
Guillaume MICHEL
1365ce6ab8 embassy-stm32: Fix bug when Uart::read future is dropped and DMA request was not stopped
fixes issue #1045

regression was introduced with PR #1031
2022-11-07 17:46:32 +01:00
bors[bot]
1f246d0e37
Merge #1034
1034: stm32/usart: Fix bug where USART idle flag could end a `read` prematuraly r=Dirbaio a=guillaume-michel

on STM32, when setting USART `detect_previous_overrun = true`, the idle flag is not cleared and could result in premature end of the `read` method.

This PR fixes that.

Co-authored-by: Guillaume MICHEL <guillaume@squaremind.io>
2022-10-28 11:22:53 +00:00
Guillaume MICHEL
49e1091309 embassy-stm32: Fix bug where USART idle flag could end a read prematuraly 2022-10-28 10:49:59 +02:00
Guillaume MICHEL
79b49c6fae embassy-stm32: remove duplicated code for USART general configuration 2022-10-28 09:32:05 +02:00
Guillaume MICHEL
f053bf742c embassy-stm32: Add support for hardware flow control for BufferedUart 2022-10-28 09:04:36 +02:00
Guillaume MICHEL
9423987ac5 embassy-stm32: Add hardware flow control constructor for UartRx and UartTx 2022-10-28 09:04:36 +02:00
Grant Miller
171b764d82 Refactor: Use PeripheralRef 2022-10-26 18:36:04 -05:00
Grant Miller
08c8022583 Refactor: Reorder _version cfgs 2022-10-26 18:04:52 -05:00
Grant Miller
4f2dcca34b Refactor: Fix v4 RccPeripheral bounds 2022-10-26 17:59:44 -05:00
Grant Miller
9c30d565b9 Refactor: Factor out Adc struct declaration 2022-10-26 17:51:12 -05:00
Grant Miller
f363f6ce92 Refactor: Don't return references to pointers 2022-10-26 17:35:06 -05:00
Grant Miller
6bf24b4d1a Refactor: Remove unused Common trait 2022-10-26 17:35:01 -05:00
Grant Miller
88bbc238b7 Set resolution directly 2022-10-26 17:07:58 -05:00
Grant Miller
2cfe2439c9 Refactor: Impl From for SampleTime and Resolution 2022-10-26 17:07:58 -05:00
Grant Miller
7b38b95e10 Refactor: Factor out Resolution 2022-10-26 17:07:58 -05:00
Grant Miller
5142674786 Fix pre-existing SampleTime typos 2022-10-26 17:07:50 -05:00
Grant Miller
a5b1d2237f Refactor: Factor out SampleTime 2022-10-26 17:06:44 -05:00
bors[bot]
7f499f3edc
Merge #1024
1024: stm32/adc: Remove voltage and temperature conversions r=Dirbaio a=GrantM11235

The current conversion utilities are confusing and a bit of a footgun. (Two out of the three examples got it wrong! They didn't measure vref at all, so all the conversions are completely wrong if vcca isn't 3.3v)

I think we should eventually have some sort of conversion utilities in the HAL, but for now I think it is best to just remove it and let the users do their own math.

cc `@chemicstry` 

Co-authored-by: Grant Miller <GrantM11235@gmail.com>
2022-10-26 19:44:06 +00:00
bors[bot]
01e23bf9dd
Merge #1025
1025: Implement I2C timeouts, second attempt r=Dirbaio a=chemicstry

This is an alterrnative to #1022 as discussed there.

Timeouts are implemented using suggested `check_timeout: impl Fn() -> Result<(), Error>` function, which does not depend on `embassy-time` by default and is a noop for regular I2C.

This also adds `time` feature like in `embassy-nrf` to enable `embassy-time` dependencies. While at it, I also gated some other peripherals that depend on `embassy-time`, notably `usb` and (partially) `subghz`.

`TimeoutI2c` is currently only implemented for i2cv1, because i2cv2 has additional complications:
- Async methods still use a lot of busy waiting code in between DMA transfers, so simple `with_timeout()` will not work and it will have to use both types of timeouts. It could probably be rewritten to replace busy waits with IRQs, but that's outside the scope of this PR.
- I2C definition `I2c<'d, T, TXDMA, RXDMA>` is different from i2cv1 `I2c<'d, T>` making it hard to share single `TimeoutI2c` wrapper. A couple of options here:
  - Duplicate `TimeoutI2c` code
  - Add dummy `TXDMA`, `RXDMA` types to i2cv1 considering that in the future it should also support DMA

Co-authored-by: chemicstry <chemicstry@gmail.com>
2022-10-26 19:34:43 +00:00
bors[bot]
e5097a8866
Merge #959
959: Generic, executor-agnostic queue implementation r=ivmarkov a=ivmarkov

Hopefully relatively well documented.

Implementation relies on a fixed-size `SortedLinkedList` from `heapless`. (By default, for up to 128 timer schedules, but we can lower this number to - say - 64.)

As discussed earlier, on queue overflow, the `WakerRegistration` approach is utilized, whereas the waker that is ordered first in the queue is awoken to make room for the incoming one (which might be the waker that would be awoken after all!). Wakers are compared with `Waker::will_wake`, so the queue should actually not fill up that easily, if at all.

I've left provisions for the user to manually instantiate the queue using a dedicated macro - `generic_queue!` so that users willing to adjust the queue size, or users (like me) who have to use the queue in a complex "on-top-of-RTOS-but-the-timer-driver-calling-back-from-ISR" scenario can customize the mutex that protects the queue.

The one thing I'm not completely happy with is the need to call `{ embassy_time::queue::initialize() }` early on before any futures using embassy-time are polled, which is currently on the shoulders of the user. I'm open to any ideas where we can get rid of this and do it on the first call to `_embassy_time_schedule_wake`, without introducing very complex combinations of critical sections, atomics and whatnot.




Co-authored-by: ivmarkov <ivan.markov@gmail.com>
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-10-26 19:14:12 +00:00
Guillaume MICHEL
9cac649fcf stm32: Add support for read_until_idle on UART 2022-10-26 19:06:18 +02:00
Dario Nieuwenhuis
eeb072d9cb Update Rust nightly. 2022-10-26 16:47:29 +02:00
Mathias
66611a80ca Introduce shared new_inner for uart instantiation 2022-10-26 11:51:37 +02:00
Mathias
d1eee52625 Merge branch 'master' of https://github.com/embassy-rs/embassy into embassy-stm32/uart-flowcontrol 2022-10-26 11:47:00 +02:00