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Author SHA1 Message Date
Bob McWhirter
be180c1c52 Create the new peripheral_pins! macro table. 2021-06-03 13:12:38 -04:00
Dario Nieuwenhuis
31feed53d5
Merge pull request #220 from folkertdev/match-on-mode 
match on SPI mode
 2021-06-03 12:05:22 +02:00
Folkert
990d83d424 match on mode 2021-06-03 11:38:25 +02:00
Dario Nieuwenhuis
0dd00c94aa Revert "Update rust nightly" 
This reverts commit f2c51e0999.
 2021-06-03 00:49:03 +02:00
Dario Nieuwenhuis
c7c6b0b464
Merge pull request #211 from bobmcwhirter/dac_v2 
DAC v2 basics.
 2021-06-02 16:16:27 +02:00
Dario Nieuwenhuis
9dcf75145c
Merge pull request #217 from lulf/stm32-rcc-improvements 
Add a way to enable more features of the STM32L0 RCC
 2021-06-02 16:13:58 +02:00
Ulf Lilleengen
c3a521066d Add utility to enable debug 2021-06-02 15:23:10 +02:00
Ulf Lilleengen
4863d5e01e Add a way to enable more features of the STM32L0 RCC 
Add ability to enable the hsi48 clock. Code modified from the STM32L0XX
hal
 2021-06-02 14:28:33 +02:00
Dario Nieuwenhuis
56ff8ebbd7
Merge pull request #216 from embassy-rs/examples 
Move examples to a subdirectory
 2021-06-02 01:45:12 +02:00
Dario Nieuwenhuis
dff03ecfc7 Move examples to a subdirectory 2021-06-02 01:32:19 +02:00
Dario Nieuwenhuis
a0c5f7137f
Merge pull request #215 from embassy-rs/update-nightly 
Update rust nightly
 2021-06-01 22:18:01 +02:00
Dario Nieuwenhuis
f2c51e0999 Update rust nightly 2021-06-01 22:07:03 +02:00
Bob McWhirter
0c54c1afd1 DAC v2 basics. 2021-06-01 12:08:30 -04:00
Dario Nieuwenhuis
2aa836b068 Fix L4+ family cfg 2021-06-01 15:57:25 +02:00
Dario Nieuwenhuis
1f2097ab11 cortex-m-rt is not a build dep 2021-06-01 15:53:44 +02:00
Dario Nieuwenhuis
4c03fdb094
Merge pull request #214 from lulf/agnostic-non-mut-waker 
Allow non-mut register and wake
 2021-06-01 15:41:36 +02:00
Ulf Lilleengen
ec9b51833c Allow non-mut register and wake 2021-06-01 15:18:53 +02:00
Dario Nieuwenhuis
f04e6ec762
Merge pull request #213 from lulf/toggleable-output 
Implement togglable output pin for Output
 2021-05-31 13:17:24 +02:00
Ulf Lilleengen
1a9a619033 Implement togglable output pin for Output 2021-05-31 09:33:33 +02:00
Dario Nieuwenhuis
553432a8e8 stm32: remove unused stuff from gen.py 2021-05-31 03:58:03 +02:00
Dario Nieuwenhuis
b4fcb81687
Merge pull request #203 from embassy-rs/metapac 
WIP: Add stm32-metapac crate, with codegen in rust
 2021-05-31 03:47:09 +02:00
Dario Nieuwenhuis
b2d8d23f4c more fix 2021-05-31 03:25:10 +02:00
Dario Nieuwenhuis
d24b67512f More fixes 2021-05-31 03:21:44 +02:00
Dario Nieuwenhuis
f4700e072d Really checkout submodules in CI 2021-05-31 03:07:46 +02:00
Dario Nieuwenhuis
c4f8f1655e Delete unused submodule 2021-05-31 02:59:06 +02:00
Dario Nieuwenhuis
2729adc68a Checkout submodules in ci 2021-05-31 02:51:47 +02:00
Dario Nieuwenhuis
60f12c78dd Add resolver=2 2021-05-31 02:43:59 +02:00
Dario Nieuwenhuis
d8e4421fc6 Add stm32-metapac crate, with codegen in rust 2021-05-31 02:40:58 +02:00
Dario Nieuwenhuis
fb85850492
Merge pull request #212 from embassy-rs/embassy-net 
Merge embassy-net repo
 2021-05-28 23:17:51 +02:00
Dario Nieuwenhuis
99048b91e9 net: add ci 2021-05-28 23:13:23 +02:00
Dario Nieuwenhuis
f55a303814 net: fix build 2021-05-28 23:10:15 +02:00
Dario Nieuwenhuis
4ebc113852 Merge remote-tracking branch 'embassy-net/main' 2021-05-28 23:07:27 +02:00
Dario Nieuwenhuis
b4c11695cf Update smoltcp 2021-05-28 22:34:07 +02:00
Dario Nieuwenhuis
6898ec7318
Merge pull request #210 from lulf/spiv2-fix 
Refactor SPI and fix write bug
 2021-05-27 23:43:52 +02:00
Ulf Lilleengen
edec5833b3 Refactor SPI and fix write bug 
* SPI write v2 was hanging in write due to an infinite loop
* SPI word write was not followed by a read back

The u8 and u16 write/read logic have been refactored into write_word and
read_word.
 2021-05-27 23:05:42 +02:00
Dario Nieuwenhuis
c4ea7427fa Update stm32-data 2021-05-27 13:46:46 +02:00
Dario Nieuwenhuis
3f6f1d99bb
Merge pull request #207 from lulf/clock-init 
Enable clock by default for stm32l0
 2021-05-27 13:36:14 +02:00
Dario Nieuwenhuis
1d3e685821
Merge pull request #209 from lulf/handle-pin-0 
Handle case where pin value could be 0
 2021-05-27 13:29:16 +02:00
Ulf Lilleengen
d4dbeb6933 Handle case where pin value could be 0 
In the case where GPIO mapping could look like this:

PA5:
  SPI1_SCK: 0

The pin would not get any generated impl because the if expression would evaluate to false. Fix this for all cases in gen.py by comparing against None
                                   ~
 2021-05-27 13:25:06 +02:00
Ulf Lilleengen
3669eba561 Use builder 2021-05-27 10:01:40 +02:00
Ulf Lilleengen
a41a812345 Move clocks to rcc mod 2021-05-27 09:50:11 +02:00
Dario Nieuwenhuis
f553a102d3
Merge pull request #205 from bobmcwhirter/i2c_v1 
I2c v1
 2021-05-27 03:10:37 +02:00
Dario Nieuwenhuis
05a2102ecb
Merge pull request #202 from bobmcwhirter/i2c 
I2c
 2021-05-27 03:07:40 +02:00
Dario Nieuwenhuis
da38de309b nrf/qspi: set correct config for flash chip in the nrf52840dk 2021-05-27 00:42:46 +02:00
Dario Nieuwenhuis
3bd36dce76 nrf/qspi: wait MORE for DPM enter. 2021-05-27 00:42:29 +02:00
Dario Nieuwenhuis
b515170e0a
Merge pull request #208 from embassy-rs/deconfigure-pins 
nRF lowpower improvements
 2021-05-26 23:52:15 +02:00
Dario Nieuwenhuis
565c606ff8 nrf/qspi: add lowpower example 2021-05-26 23:28:40 +02:00
Dario Nieuwenhuis
de703eb605 nrf/qspi: proper lowpower drop, supporting DPM. 2021-05-26 23:26:07 +02:00
Ulf Lilleengen
6eaf224fec No more systemclock 2021-05-26 21:46:57 +02:00
Ulf Lilleengen
bfa999a2e0 Assume tim2 in macro and remove clock setup in chip specific rcc init 
Add temporary start_tim2() fn to Clock to assist macro in starting
embassy clock
 2021-05-26 21:42:07 +02:00