Ulf Lilleengen
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e55726964d
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Fix clock setup for MSI and PLL to allow RNG opereation
Add RNG example using PLL as clock source.
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2021-10-26 13:45:53 +02:00 |
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Vincent Stakenburg
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7d6d274d55
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Add MSI and PLL clock source for L4
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2021-09-24 18:27:39 +02:00 |
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Dario Nieuwenhuis
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7bfb763e09
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Rename embassy-extras to embassy-hal-common
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2021-07-29 13:44:51 +02:00 |
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Ulf Lilleengen
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49fad2de8a
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Use correct frequencies for timers
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2021-06-15 16:07:23 +02:00 |
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Ulf Lilleengen
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5e1b0a5398
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Add wb55 clocks
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2021-06-14 11:41:02 +02:00 |
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Ulf Lilleengen
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ee9f67fa01
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Add common types
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2021-06-14 11:33:11 +02:00 |
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Ulf Lilleengen
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95532726b2
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Add minimal RCC impls for L4 and F4
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2021-06-14 11:33:11 +02:00 |
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