Commit Graph

141 Commits

Author SHA1 Message Date
Grant Miller
d49f40dd5c embassy-stm32: Misc clippy fixes 2023-08-06 15:00:39 -05:00
bofh
6b1d802caa Move frequency to SPI config 2023-07-30 18:01:34 +02:00
Dario Nieuwenhuis
036e6ae30c
Rename embassy-hal-common to embassy-hal-internal, document it's for internal use only. (#1700) 2023-07-28 13:23:22 +02:00
Dario Nieuwenhuis
a101d9078d update embedded-hal crates. 2023-07-04 19:59:36 +02:00
Dario Nieuwenhuis
e892014b65 Update stm32-metapac, includes chiptool changes to use real Rust enums now. 2023-06-29 02:01:33 +02:00
Dario Nieuwenhuis
558918651e stm32: update stm32-metapac. 2023-06-19 03:22:12 +02:00
bors[bot]
224faccd4c
Merge #1340 #1474
1340: Add I2S for f4 r=Dirbaio a=xoviat

This is only for f4, but it puts us equal to or ahead of the standard rust hal.

1474: stm32: Fix watchdog timeout computation r=Dirbaio a=rmja



Co-authored-by: xoviat <xoviat@users.noreply.github.com>
Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
2023-05-25 00:42:10 +00:00
ceekdee
91612b7446 Simplify SUBGHZSPI configuration. 2023-05-04 09:45:18 -05:00
ceekdee
629e0ea595 Handle SUBGHZSPI as async. 2023-05-03 21:05:47 -05:00
xoviat
02d6e0d14d stm32/i2s: add module and example for f4 2023-05-03 18:17:57 -05:00
ceekdee
02c86bca52 Add external LoRa physical layer functionality. 2023-04-21 01:20:46 -05:00
anton smeenk
3260f6b2af stm32/spi: add new_txonly_nosck constructor, for neopixels, with an example in the stm32g0 directory. 2023-04-18 20:59:25 +02:00
Dario Nieuwenhuis
2080d8bb6d stm32/spi: add support for all word sizes.
Co-Authored-By: anton smeenk <asmeenk@planet.nl>
2023-04-18 20:56:23 +02:00
Dario Nieuwenhuis
173c65b543 stm32/dma: refactor. 2023-04-18 16:37:35 +02:00
Dario Nieuwenhuis
4ef8e008e8 stm32/spi: add v4/v5 support (for H5). 2023-04-10 15:25:11 +02:00
Patrick Oppenlander
aabc275186 stm32/spi: fix occasional data corruption
Need to clear the rx fifo before enabling rx dma.
2023-03-01 12:24:22 +11:00
Ralf
e3174d7a99 STM32 SPI: Set clk-pin pull-up/-down to match spi clock polarity
RM0394:

    40.4.6
    Communication formats
    ...
    The idle state of SCK must correspond to the polarity selected in the SPIx_CR1 register (by
    pulling up SCK if CPOL=1 or pulling down SCK if CPOL=0).
2023-02-06 13:23:35 +01:00
Rasmus Melchior Jacobsen
47a0769fc2 Let repeated clock byte be singular pointer and not array pointer 2022-12-23 15:49:22 +01:00
Rasmus Melchior Jacobsen
662bb5797f fix(stm32): Ensure that gpio speed is VeryHigh for all spi versions
This fixes #1095
2022-12-23 09:34:42 +01:00
Rasmus Melchior Jacobsen
2457fcaa35 fix(stm32): Align with updated dma::write_repeated signature 2022-12-23 09:33:34 +01:00
Guillaume MICHEL
e0ea5dfdb2 embassy-stm32: Allow SPI with DMA to implement blocking embbeded-hal traits 2022-11-30 09:26:16 +01:00
Dario Nieuwenhuis
1e2fb0459d Switch to async-fn-in-trait 2022-11-25 21:02:06 +01:00
Ulf Lilleengen
72c2e985bb Update embedded-hal versions and explicitly pin 2022-09-29 11:27:46 +02:00
Dario Nieuwenhuis
10d1ad2343 Replace futures::future::join -> embassy_futures::join::join. 2022-09-22 16:48:35 +02:00
bors[bot]
6264fe39a5
Merge #839
839: Misc LoRaWAN improvements r=lulf a=timokroeger

Trying too get `embassy-lora` running on a [LoRa-E5 Dev Board](https://wiki.seeedstudio.com/LoRa_E5_Dev_Board/).
I can see the join message arriving in the The Things Network console but the device does not receive the accept message yet.
Opening this PR anyway because I think there are some nice things to decouple the lora crate from the nucleo board.

`@lulf` Could you test if this PR breaks your LoRa setup? Marking as draft for the time being.

Co-authored-by: Timo Kröger <timokroeger93@gmail.com>
Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
2022-09-04 07:17:23 +00:00
Dario Nieuwenhuis
8ba421f324 Do not use cfg_if for embedded-hal-async feature gates.
Old code used `cfg_if!` because rustc still parses code inside disabled cfg's, and Rust stable at that time couldn't parse the new GAT where-clause location. This is not the case anymore.
2022-08-31 03:11:21 +02:00
Timo Kröger
308ca4b8e3 Use pub(crate) visibility for internal SPI
SubGhz provides a public interface for the radio connected to internal SPI
`#[allow(dead_code)]` is required for CI to succeed
2022-08-26 15:44:58 +02:00
Timo Kröger
61c666212f stm32wl: Do not require external SPI pins for SUBGHZ
For the Seeed Studio Lora-E5 those pins conflict with the radio frontend control GPIOS (PA4 and PA5).
2022-08-26 15:42:25 +02:00
Dario Nieuwenhuis
4901c34d9c Rename Unborrowed -> PeripheralRef, Unborrow -> Peripheral 2022-07-23 14:00:19 +02:00
Dario Nieuwenhuis
8a9d2f59af Update embassy-stm32 2022-07-23 02:40:13 +02:00
Grant Miller
5ecbe5c918 embassy-stm32: Simplify time
- Remove unused `MilliSeconds`, `MicroSeconds`, and `NanoSeconds` types
- Remove `Bps`, `KiloHertz`, and `MegaHertz` types that were only used
for converting to `Hertz`
- Replace all instances of `impl Into<Hertz>` with `Hertz`
- Add `hz`, `khz`, and `mhz` methods to `Hertz`, as well as
free function shortcuts
- Remove `U32Ext` extension trait
2022-07-10 21:46:45 -05:00
Henrik Alsér
880b71a1e8 impl SetConfig for stm32 i2c and SPI 2022-07-09 02:28:05 +02:00
Dario Nieuwenhuis
a8703b7598 Run rustfmt. 2022-06-12 22:22:31 +02:00
Dario Nieuwenhuis
5085100df2 Add embassy-cortex-m crate.
- Move Interrupt and InterruptExecutor from `embassy` to `embassy-cortex-m`.
- Move Unborrow from `embassy` to `embassy-hal-common` (nothing in `embassy` requires it anymore)
- Move PeripheralMutex from `embassy-hal-common` to `embassy-cortex-m`.
2022-06-12 21:45:38 +02:00
Dario Nieuwenhuis
009bb8e4e1 stm32: add stm32u5 GPDMA, SPIv4 support, add HIL tests. 2022-04-27 01:16:14 +02:00
chemicstry
6d547b1143 SDIO working on stm32f4 2022-03-16 18:52:27 +02:00
Dario Nieuwenhuis
1dc618f0e4 stm32/spi: fix blocking transfer hanging after async. 2022-03-15 04:13:33 +01:00
Grant Miller
49ef19c0b2 stm32/spi: Clear rx fifo in blocking methods 2022-03-14 21:55:37 -05:00
Dario Nieuwenhuis
059b164234 stm32/spi: do not clear rxfifo in SPIv3, the hw already does it. 2022-03-15 02:37:08 +01:00
Dario Nieuwenhuis
4579192832 stm32/spi: fix hang in SPIv3 by not waiting for rxfifo empty in finish_dma. 2022-03-15 02:36:34 +01:00
Dario Nieuwenhuis
306110f56e stm32/spi: implement async trasnfer_in_place 2022-03-15 00:40:48 +01:00
Grant Miller
f1d6c95205 rustfmt 2022-03-14 18:22:41 -05:00
Grant Miller
71632648c7 Fix zero-length-slice bugs 2022-03-14 18:14:55 -05:00
Grant Miller
15c533fe2a Fix async write bug 2022-03-14 18:04:31 -05:00
Grant Miller
6e00c58854 Make all functions generic over word size 2022-03-14 16:53:50 -05:00
Grant Miller
f0b62bc8e0 Use const REGS 2022-03-14 15:56:08 -05:00
Grant Miller
482ffea4dd Finish unification 2022-03-14 15:56:08 -05:00
Grant Miller
406b1b3dd2 Finish matching versions 2022-03-14 15:56:08 -05:00
Grant Miller
7cd6f00a90 Add set_txdmaen and set_rxdmaen functions 2022-03-14 15:56:08 -05:00
Grant Miller
444b37fcdf Add flush_rx_fifo function 2022-03-14 15:56:08 -05:00