Compare commits

..

No commits in common. "main" and "no-more-nightly" have entirely different histories.

4 changed files with 12 additions and 30 deletions

View File

@ -35,7 +35,7 @@ For Cortex-M targets, consider making sure that ALL of the following features ar
* `executor-thread`
* `nightly`
For ESP32, consider using the executors and `#[main]` macro provided by your appropriate link:https://crates.io/crates/esp-hal-common[HAL crate].
For Xtensa ESP32, consider using the executors and `#[main]` macro provided by your appropriate link:https://crates.io/crates/esp-hal-common[HAL crate].
== Why is my binary so big?

View File

@ -184,12 +184,10 @@ impl<'d, DFU: NorFlash, STATE: NorFlash> BlockingFirmwareUpdater<'d, DFU, STATE>
///
/// Failing to meet alignment and size requirements may result in a panic.
pub fn write_firmware(&mut self, offset: usize, data: &[u8]) -> Result<(), FirmwareUpdaterError> {
//assert!(data.len() >= DFU::ERASE_SIZE);
assert!(data.len() >= DFU::ERASE_SIZE);
self.state.verify_booted()?;
if offset == 0 {
self.dfu.erase(0, self.dfu.capacity() as u32)?;
}
self.dfu.erase(offset as u32, (offset + data.len()) as u32)?;
self.dfu.write(offset as u32, data)?;

View File

@ -161,10 +161,6 @@ pub struct Config {
/// Set this to true to invert RX pin signal values (V<sub>DD</sub> =0/mark, Gnd = 1/idle).
#[cfg(any(usart_v3, usart_v4))]
pub invert_rx: bool,
/// enable single wire half duplex communication. Only the tx pin is used. Needs an external
/// pull up
pub half_duplex: bool,
}
impl Default for Config {
@ -184,7 +180,6 @@ impl Default for Config {
invert_tx: false,
#[cfg(any(usart_v3, usart_v4))]
invert_rx: false,
half_duplex: false,
}
}
}
@ -816,27 +811,19 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
let r = T::regs();
// Some chips do not have swap_rx_tx bit
if config.half_duplex {
if config.swap_rx_tx {
rx.set_as_af(rx.af_num(), AFType::OutputOpenDrain);
} else {
tx.set_as_af(tx.af_num(), AFType::OutputOpenDrain);
}
} else {
cfg_if::cfg_if! {
if #[cfg(any(usart_v3, usart_v4))] {
if config.swap_rx_tx {
let (rx, tx) = (tx, rx);
rx.set_as_af(rx.af_num(), AFType::Input);
tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
} else {
rx.set_as_af(rx.af_num(), AFType::Input);
tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
}
cfg_if::cfg_if! {
if #[cfg(any(usart_v3, usart_v4))] {
if config.swap_rx_tx {
let (rx, tx) = (tx, rx);
rx.set_as_af(rx.af_num(), AFType::Input);
tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
} else {
rx.set_as_af(rx.af_num(), AFType::Input);
tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
}
} else {
rx.set_as_af(rx.af_num(), AFType::Input);
tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
}
}
@ -1052,7 +1039,6 @@ fn configure(
#[cfg(not(usart_v1))]
r.cr3().modify(|w| {
w.set_onebit(config.assume_noise_free);
w.set_hdsel(config.half_duplex);
});
r.cr1().write(|w| {

View File

@ -73,8 +73,6 @@ impl<'d, STATE: NorFlash, RST: Reset> Handler for Control<'d, STATE, RST> {
self.detach_start = Some(Instant::now());
self.timeout = Some(Duration::from_millis(req.value as u64));
self.state = State::AppDetach;
// hack to make it work together with usb serial logging
self.reset();
Some(OutResponse::Accepted)
}
_ => None,