bors[bot] 01e5376b25 Merge #456 ... 456: Fix L4 clock setup for MSI and PLL to allow RNG operation r=Dirbaio a=lulf Example is tested on STM32L475VG. Co-authored-by: Ulf Lilleengen <lulf@redhat.com>		2021-10-26 11:59:14 +00:00
..
nrf	nrf: add NVMC driver.	2021-10-22 02:14:33 +02:00
rp	Update lots of deps	2021-09-11 01:35:23 +02:00
std	examples/std: fix warning	2021-10-18 01:37:35 +02:00
stm32f0	Update lots of deps	2021-09-11 01:35:23 +02:00
stm32f1	Initial STM32F1 family support with two examples for STM32F103C8 (Blue Pill)	2021-09-28 18:31:04 +02:00
stm32f4	Update lots of deps	2021-09-11 01:35:23 +02:00
stm32g0	Update lots of deps	2021-09-11 01:35:23 +02:00
stm32h7	Update version of critical-section	2021-09-13 17:05:17 +02:00
stm32l0	Use upstream version of rust-lorawan	2021-10-22 19:33:15 +02:00
stm32l1	Support for STM32L1	2021-09-21 14:50:23 +02:00
stm32l4	Merge #456	2021-10-26 11:59:14 +00:00
stm32wb55	Update lots of deps	2021-09-11 01:35:23 +02:00
stm32wl55	Use upstream version of rust-lorawan	2021-10-22 19:33:15 +02:00
wasm	Update version of critical-section	2021-09-13 17:05:17 +02:00