09f078a1cc
there's nothing this critical section protects against. both read and write-to-clear are atomic and don't interfere with other irq futures, only potentially with setting/clearing an irq flag from an arm core. neither have ever been synchronized, and both have the same observable effects under atomic writes and critical sections. (for both setting and clearing an irq flag observable differences could only happen if the set/clear happened after the poll read, but before the write. if it's a clear we observe the same effects as sequencing the clear entirely after the poll, and if it's a set we observe the same effects as sequencing the set entirely before the poll) |
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| .. | ||
| src | ||
| build.rs | ||
| Cargo.toml | ||
| funcsel.txt | ||
| link-rp.x.in | ||