308 lines
8.0 KiB
Rust
308 lines
8.0 KiB
Rust
use core::convert::Infallible;
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use core::future::Future;
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use core::marker::PhantomData;
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use core::pin::Pin;
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use core::task::{Context, Poll};
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use embassy::traits::gpio::{WaitForAnyEdge, WaitForFallingEdge, WaitForRisingEdge};
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use embassy::util::Unborrow;
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use embassy::waitqueue::AtomicWaker;
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use embassy_hal_common::unsafe_impl_unborrow;
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use embedded_hal::digital::v2::InputPin;
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use crate::gpio::{AnyPin, Input, Pin as GpioPin};
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use crate::interrupt;
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use crate::pac;
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use crate::pac::exti::regs::Lines;
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use crate::pac::EXTI;
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use crate::peripherals;
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const EXTI_COUNT: usize = 16;
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const NEW_AW: AtomicWaker = AtomicWaker::new();
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static EXTI_WAKERS: [AtomicWaker; EXTI_COUNT] = [NEW_AW; EXTI_COUNT];
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#[cfg(exti_w)]
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fn cpu_regs() -> pac::exti::Cpu {
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EXTI.cpu(crate::pac::CORE_INDEX)
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}
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#[cfg(not(exti_w))]
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fn cpu_regs() -> pac::exti::Exti {
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EXTI
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}
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#[cfg(not(any(exti_g0, exti_l5, gpio_v1)))]
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fn exticr_regs() -> pac::syscfg::Syscfg {
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pac::SYSCFG
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}
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#[cfg(any(exti_g0, exti_l5))]
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fn exticr_regs() -> pac::exti::Exti {
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EXTI
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}
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#[cfg(gpio_v1)]
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fn exticr_regs() -> pac::afio::Afio {
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pac::AFIO
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}
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pub unsafe fn on_irq() {
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#[cfg(not(any(exti_g0, exti_l5)))]
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let bits = EXTI.pr(0).read().0;
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#[cfg(any(exti_g0, exti_l5))]
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let bits = EXTI.rpr(0).read().0 | EXTI.fpr(0).read().0;
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// Mask all the channels that fired.
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cpu_regs().imr(0).modify(|w| w.0 &= !bits);
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// Wake the tasks
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for pin in BitIter(bits) {
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EXTI_WAKERS[pin as usize].wake();
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}
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// Clear pending
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#[cfg(not(any(exti_g0, exti_l5)))]
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EXTI.pr(0).write_value(Lines(bits));
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#[cfg(any(exti_g0, exti_l5))]
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{
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EXTI.rpr(0).write_value(Lines(bits));
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EXTI.fpr(0).write_value(Lines(bits));
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}
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}
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struct BitIter(u32);
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impl Iterator for BitIter {
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type Item = u32;
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fn next(&mut self) -> Option<Self::Item> {
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match self.0.trailing_zeros() {
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32 => None,
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b => {
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self.0 &= !(1 << b);
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Some(b)
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}
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}
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}
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}
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/// EXTI input driver
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pub struct ExtiInput<'d, T: GpioPin> {
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pin: Input<'d, T>,
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}
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impl<'d, T: GpioPin> Unpin for ExtiInput<'d, T> {}
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impl<'d, T: GpioPin> ExtiInput<'d, T> {
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pub fn new(pin: Input<'d, T>, _ch: impl Unborrow<Target = T::ExtiChannel> + 'd) -> Self {
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Self { pin }
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}
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}
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impl<'d, T: GpioPin> InputPin for ExtiInput<'d, T> {
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type Error = Infallible;
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fn is_high(&self) -> Result<bool, Self::Error> {
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self.pin.is_high()
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}
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fn is_low(&self) -> Result<bool, Self::Error> {
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self.pin.is_low()
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}
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}
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impl<'d, T: GpioPin> WaitForRisingEdge for ExtiInput<'d, T> {
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type Future<'a> = ExtiInputFuture<'a>;
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fn wait_for_rising_edge<'a>(&'a mut self) -> Self::Future<'a> {
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ExtiInputFuture::new(self.pin.pin.pin(), self.pin.pin.port(), true, false)
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}
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}
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impl<'d, T: GpioPin> WaitForFallingEdge for ExtiInput<'d, T> {
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type Future<'a> = ExtiInputFuture<'a>;
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fn wait_for_falling_edge<'a>(&'a mut self) -> Self::Future<'a> {
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ExtiInputFuture::new(self.pin.pin.pin(), self.pin.pin.port(), false, true)
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}
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}
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impl<'d, T: GpioPin> WaitForAnyEdge for ExtiInput<'d, T> {
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type Future<'a> = ExtiInputFuture<'a>;
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fn wait_for_any_edge<'a>(&'a mut self) -> Self::Future<'a> {
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ExtiInputFuture::new(self.pin.pin.pin(), self.pin.pin.port(), true, true)
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}
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}
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pub struct ExtiInputFuture<'a> {
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pin: u8,
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phantom: PhantomData<&'a mut AnyPin>,
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}
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impl<'a> ExtiInputFuture<'a> {
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fn new(pin: u8, port: u8, rising: bool, falling: bool) -> Self {
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cortex_m::interrupt::free(|_| unsafe {
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let pin = pin as usize;
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exticr_regs()
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.exticr(pin / 4)
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.modify(|w| w.set_exti(pin % 4, port));
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EXTI.rtsr(0).modify(|w| w.set_line(pin, rising));
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EXTI.ftsr(0).modify(|w| w.set_line(pin, falling));
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// clear pending bit
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#[cfg(not(any(exti_g0, exti_l5)))]
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EXTI.pr(0).write(|w| w.set_line(pin, true));
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#[cfg(any(exti_g0, exti_l5))]
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{
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EXTI.rpr(0).write(|w| w.set_line(pin, true));
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EXTI.fpr(0).write(|w| w.set_line(pin, true));
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}
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cpu_regs().imr(0).modify(|w| w.set_line(pin, true));
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});
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Self {
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pin,
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phantom: PhantomData,
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}
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}
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}
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impl<'a> Drop for ExtiInputFuture<'a> {
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fn drop(&mut self) {
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cortex_m::interrupt::free(|_| unsafe {
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let pin = self.pin as _;
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cpu_regs().imr(0).modify(|w| w.set_line(pin, false));
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});
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}
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}
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impl<'a> Future for ExtiInputFuture<'a> {
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type Output = ();
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fn poll(self: Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<Self::Output> {
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EXTI_WAKERS[self.pin as usize].register(cx.waker());
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let imr = unsafe { cpu_regs().imr(0).read() };
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if !imr.line(self.pin as _) {
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Poll::Ready(())
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} else {
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Poll::Pending
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}
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}
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}
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macro_rules! foreach_exti_irq {
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($action:ident) => {
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crate::pac::interrupts!(
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(EXTI0) => { $action!(EXTI0); };
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(EXTI1) => { $action!(EXTI1); };
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(EXTI2) => { $action!(EXTI2); };
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(EXTI3) => { $action!(EXTI3); };
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(EXTI4) => { $action!(EXTI4); };
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(EXTI5) => { $action!(EXTI5); };
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(EXTI6) => { $action!(EXTI6); };
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(EXTI7) => { $action!(EXTI7); };
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(EXTI8) => { $action!(EXTI8); };
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(EXTI9) => { $action!(EXTI9); };
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(EXTI10) => { $action!(EXTI10); };
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(EXTI11) => { $action!(EXTI11); };
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(EXTI12) => { $action!(EXTI12); };
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(EXTI13) => { $action!(EXTI13); };
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(EXTI14) => { $action!(EXTI14); };
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(EXTI15) => { $action!(EXTI15); };
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// plus the weird ones
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(EXTI0_1) => { $action!( EXTI0_1 ); };
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(EXTI15_10) => { $action!(EXTI15_10); };
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(EXTI15_4) => { $action!(EXTI15_4); };
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(EXTI1_0) => { $action!(EXTI1_0); };
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(EXTI2_3) => { $action!(EXTI2_3); };
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(EXTI2_TSC) => { $action!(EXTI2_TSC); };
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(EXTI3_2) => { $action!(EXTI3_2); };
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(EXTI4_15) => { $action!(EXTI4_15); };
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(EXTI9_5) => { $action!(EXTI9_5); };
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);
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};
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}
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macro_rules! impl_irq {
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($e:ident) => {
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#[interrupt]
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unsafe fn $e() {
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on_irq()
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}
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};
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}
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foreach_exti_irq!(impl_irq);
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pub(crate) mod sealed {
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pub trait Channel {}
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}
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pub trait Channel: sealed::Channel + Sized {
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fn number(&self) -> usize;
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fn degrade(self) -> AnyChannel {
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AnyChannel {
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number: self.number() as u8,
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}
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}
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}
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pub struct AnyChannel {
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number: u8,
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}
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unsafe_impl_unborrow!(AnyChannel);
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impl sealed::Channel for AnyChannel {}
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impl Channel for AnyChannel {
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fn number(&self) -> usize {
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self.number as usize
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}
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}
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macro_rules! impl_exti {
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($type:ident, $number:expr) => {
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impl sealed::Channel for peripherals::$type {}
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impl Channel for peripherals::$type {
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fn number(&self) -> usize {
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$number as usize
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}
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}
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};
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}
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impl_exti!(EXTI0, 0);
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impl_exti!(EXTI1, 1);
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impl_exti!(EXTI2, 2);
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impl_exti!(EXTI3, 3);
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impl_exti!(EXTI4, 4);
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impl_exti!(EXTI5, 5);
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impl_exti!(EXTI6, 6);
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impl_exti!(EXTI7, 7);
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impl_exti!(EXTI8, 8);
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impl_exti!(EXTI9, 9);
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impl_exti!(EXTI10, 10);
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impl_exti!(EXTI11, 11);
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impl_exti!(EXTI12, 12);
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impl_exti!(EXTI13, 13);
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impl_exti!(EXTI14, 14);
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impl_exti!(EXTI15, 15);
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macro_rules! enable_irq {
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($e:ident) => {
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crate::interrupt::$e::steal().enable();
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};
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}
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/// safety: must be called only once
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pub(crate) unsafe fn init() {
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use embassy::interrupt::Interrupt;
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use embassy::interrupt::InterruptExt;
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foreach_exti_irq!(enable_irq);
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#[cfg(not(any(rcc_wb, rcc_wl5, rcc_f1)))]
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<crate::peripherals::SYSCFG as crate::rcc::sealed::RccPeripheral>::enable();
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#[cfg(rcc_f1)]
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<crate::peripherals::AFIO as crate::rcc::sealed::RccPeripheral>::enable();
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}
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