embassy/tests/stm32
bors[bot] 1fdde8f03f
Merge #1457
1457: TL Mbox read and write for stm32wb r=xoviat a=OueslatiGhaith

Hello,

This pull request is related to #1397 and #1401, inspired by #24, built upon the work done in #1405 and #1424, and was tested on an stm32wb55rg.

This pull request aims to add read and write functionality to the TL mailbox for stm32wb microcontrollers

Co-authored-by: goueslati <ghaith.oueslati@habemus.com>
Co-authored-by: xoviat <xoviat@users.noreply.github.com>
2023-05-23 01:15:22 +00:00
..
.cargo Add env DEFMT_LOG=trace to all examples. 2022-06-18 01:59:12 +02:00
src Merge #1457 2023-05-23 01:15:22 +00:00
build.rs stm32/ipcc: fix hil test 2023-05-21 20:18:26 -05:00
Cargo.toml stm32/ipcc: disable test 2023-05-22 20:14:37 -05:00
gen_test.py stm32/sdmmc: add hil test for f4. 2023-04-17 21:49:34 +02:00
link_ram.x tests/stm32: make __sdata=__edata so that cortex-m-rt doesn't try to copy it from "flash". 2022-01-05 13:30:08 +01:00
memory_ble.x stm32/ipcc: fix hil test 2023-05-21 20:18:26 -05:00
teleprobe.sh stm32/usart: expose all functionality as inherent methods. 2022-01-19 17:59:55 +01:00