85 lines
2.0 KiB
Rust
85 lines
2.0 KiB
Rust
#[allow(dead_code)]
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#[derive(Clone, Copy)]
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pub enum Register {
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EHT0 = 0x00,
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EHT1 = 0x01,
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EHT2 = 0x02,
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EHT3 = 0x03,
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EHT4 = 0x04,
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EHT5 = 0x05,
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EHT6 = 0x06,
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EHT7 = 0x07,
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EPMM0 = 0x08,
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EPMM1 = 0x09,
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EPMM2 = 0x0a,
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EPMM3 = 0x0b,
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EPMM4 = 0x0c,
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EPMM5 = 0x0d,
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EPMM6 = 0x0e,
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EPMM7 = 0x0f,
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EPMCSL = 0x10,
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EPMCSH = 0x11,
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EPMOL = 0x14,
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EPMOH = 0x15,
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ERXFCON = 0x18,
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EPKTCNT = 0x19,
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}
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impl Register {
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pub(crate) fn addr(&self) -> u8 {
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*self as u8
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}
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pub(crate) fn is_eth_register(&self) -> bool {
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match *self {
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Register::EHT0 => true,
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Register::EHT1 => true,
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Register::EHT2 => true,
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Register::EHT3 => true,
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Register::EHT4 => true,
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Register::EHT5 => true,
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Register::EHT6 => true,
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Register::EHT7 => true,
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Register::EPMM0 => true,
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Register::EPMM1 => true,
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Register::EPMM2 => true,
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Register::EPMM3 => true,
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Register::EPMM4 => true,
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Register::EPMM5 => true,
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Register::EPMM6 => true,
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Register::EPMM7 => true,
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Register::EPMCSL => true,
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Register::EPMCSH => true,
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Register::EPMOL => true,
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Register::EPMOH => true,
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Register::ERXFCON => true,
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Register::EPKTCNT => true,
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}
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}
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}
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impl Into<super::Register> for Register {
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fn into(self) -> super::Register {
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super::Register::Bank1(self)
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}
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}
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register!(ERXFCON, 0b1010_0001, u8, {
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#[doc = "Broadcast Filter Enable bit"]
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bcen @ 0,
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#[doc = "Multicast Filter Enable bit"]
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mcen @ 1,
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#[doc = "Hash Table Filter Enable bit"]
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hten @ 2,
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#[doc = "Magic Packet™ Filter Enable bit"]
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mpen @ 3,
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#[doc = "Pattern Match Filter Enable bit"]
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pmen @ 4,
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#[doc = "Post-Filter CRC Check Enable bit"]
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crcen @ 5,
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#[doc = "AND/OR Filter Select bit"]
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andor @ 6,
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#[doc = "Unicast Filter Enable bit"]
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ucen @ 7,
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});
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