Ralf c90968bb70 stm32/rcc: Modify only relevant CFGR bits and keep the settings previously done. ...

PLL settings remained intact because these bits are not writable when PLL is enabled,
but prescaler settings were overwritten by selecting PLL as sysclk (CFGR.SW[1:0]).

2022-05-12 09:09:39 +02:00

..

src

stm32/rcc: Modify only relevant CFGR bits and keep the settings previously done.

2022-05-12 09:09:39 +02:00

build.rs

Replace embassy::io with embedded_io.

2022-05-07 01:45:54 +02:00

Cargo.toml

Replace embassy::io with embedded_io.

2022-05-07 01:45:54 +02:00